Beyond this point, we can continue to make smaller transistors and pack more of them into the same size die, but we cannot continue to reduce the cost. In most cases, in fact, the same SoC will actually have a higher cost!
The famous Moore's Law was presented as an observation by Moore in his 1965 Electronics paper "The future of integrated electronics," in which he said:
The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years.
Clearly, Moore's Law is about "The complexity for minimum component costs," and the minimum component cost will be at the 28nm node for many years, as we will detail in the remainder of this blog.
The following chart was presented by ST's Joël Hartmann (EVP of Manufacturing and Process R&D, Embedded Processing Solutions) during Semi's recent ISS 2014 Europe Symposium:
Hartmann is making the case that the "Moore's Law discontinuation due to cost stagnation or increase" applies to bulk technologies, which is the technology base of the majority of the industry. ST's information is backed by GlobalFoundries as we can see from the following chart presented at the 2013 SOI Consortium workshop in Kyoto, Japan.
The above GlobalFoundries chart shows that the lowest-cost transistor is at the polySiON 28nm node. Beyond 28nm, scaling becomes extremely expensive due to double litho, HKMG, FinFET, etc.