Achronix Semiconductor Corp. (Santa Clara, Calif.) is the provider of the Speedcore FPGA technology and has been collaborating with AccelerComm.
Polar forward error correction (FEC) codes are utilized in the control channel of 5G systems. The AccelerComm polar code solution is built around a memory architecture that delivers the information to processing elements with improved hardware efficiency, power efficiency and reduced latency. The availability of this IP for the Speedcore eFPGA fabric enables a lower power and higher throughput solution than alternative, software-based approaches. Instantiating the polar code IP within an eFPGA-equipped application specific integrated circuit (ASIC) or system on chip (SoC) enables an integrated solution with minimal communication latency and low-power consumption.
"We see that the ability to flexibly reprogram a hardware accelerator for new requirements and emerging standards is going to be fundamental for cost-effective 5G deployments," said Mike Fitton, business development director at Achronix, in a statement issued by AccelerComm.
"These new elements of the 5G release 16 specification require innovation for emerging waveforms and new coding. AccelerComm excellence in IP engineering combined with the flexible hardware acceleration portfolio from Achronix provides a powerful way to future-proof customers’ communications infrastructure deployments," said Tom Cronk, chairman and acting chief executive officer at AccelerComm, in the same statement.
Speedcore look-up-tables (LUTs), RAM blocks and DSP64 blocks can be assembled to create an optimized programmable fabric for multiple applications and would allow multiple accelerators to exist virtually and be loaded into the fabric as required.
AccelerComm is a startup semiconductor IP core company founded in 2016. Its turbo coding technology enables 10 times the throughput and 10 times the latency improvement over existing products, making it suitable for meeting the requirements of LTE Advanced Pro.
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