In a short introduction video, Nicolas Loubet, in charge of advanced epitaxy and sub-7nm device integration at IBM research explains that resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.
Scientists working as part of the IBM-led Research Alliance at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY achieved the breakthrough by using stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology.
The silicon nanosheet transistor demonstration, as detailed in the Research Alliance paper "Stacked Nanosheet Gate-All-Around Transistor to Enable Scaling Beyond FinFET", and published by VLSI, proves that 5nm chips are possible, more powerful, and not too far off in the future.
Compared to the leading edge 10nm technology available in the market, a nanosheet-based 5nm technology can deliver 40 percent performance enhancement at fixed power, or 75 percent power savings at matched performance.
"This announcement is the latest example of the world-class research that continues to emerge from our ground-breaking public-private partnership in New York,” said Gary Patton, CTO and Head of Worldwide R&D at Globalfoundries. “As we make progress toward commercializing 7nm in 2018 at our Fab 8 manufacturing facility, we are actively pursuing next-generation technologies at 5nm and beyond to maintain technology leadership and enable our customers to produce a smaller, faster, and more cost efficient generation of semiconductors.”
IBM Research has explored nanosheet semiconductor technology for more than 10 years. This work is the first in the industry to demonstrate the feasibility to design and fabricate stacked nanosheet devices with electrical properties superior to FinFET architecture.