Analyzer generates clean eye diagrams for 400G test

August 11, 2016 // By Susan Nordyk
Teamed with the G0361A 64-Gbaud, 2-bit DAC, Anritsu’s MP1800A signal-quality analyzer accurately verifies high-speed interconnects and backplanes. The combination generates extremely clean eye diagrams at up to 128 Gbps per channel for 400G applications, allowing engineers to ensure that their high-speed devices, modules, and network systems are in compliance with industry standards, including 400 GbE and CEI-56G.

The G0361A DAC connects with any of the MP1800A’s PPG (pulse pattern generator) modules. With dual-channel 2×1 multiplexers in the input section, the G0361A can generate signals ranging from 32 Gbps × 4CH NRZ to 128G PAM4 (64 Gbaud), enabling low-cost expansion to 128G PAM4.

According to Anritsu, the MP1800A/G0361A combo is the industry’s first solution to support 128G PAM4 generation and BER tests with accurate jitter injection. It allows engineers to test every bit of a PAM4 signal for more accurate analysis of next-generation 400 GbE interconnects and backplanes.

The MP1800A BERT is a flexible platform that incorporates a built-in PPG module for generating high-quality, high-amplitude signals, as well as an ED (error detection) module with high input sensitivity. Each PPG and ED module offers one, two, or four channels to accommodate multichannel synchronization of up to eight channels at 32 Gbps. More at the MP1800A product page and the G0361A datasheet .