The bare bone device comprises all the basic building blocks common to most microprocessors, including an arithmetic logic unit (ALU), which for simplicity was implemented to only perform logical conjunction and disjunction operations, an accumulator (AC), which holds one of the operands to be supplied to the ALU, an instruction register (IR) that stores the content of the program memory currently being executed, a control unit (CU) that receives as input the instruction code from the IR and orchestrates all resources by enabling components to access the internal bus via the control signals EA and EO; a program counter (PC) which supplies the memory with the address of the active instruction and an output register (OR) that allows the processor to transfer the results of a calculation to the output port. Memory was implemented off-chip.
Subunits, such as for example, the ALU or the IR, were provided with metal pads for individual testing in a wafer probe station.
Because no metal catalyst was required for the synthesis of the MoS2 films, the researchers are confident they could growth such devices directly on flexible substrates. Because the 2D semiconductor materials are so thin, only a few atoms thick, and thanks to their excellent electrical properties, they are inherently flexible and compact which make them suitable for fully flexible electronic devices.
Lead researcher on this project, Thomas Mueller from TU Vienna expects such processor circuits to be combined with light emitters (also made with MoS2) to make flexible displays and e-paper, or sees them integrated as logic circuits in smart flexible sensors. Next on the researchers' roadmap is a full 8-bit design, with smaller feature sizes.
"Our approach is to improve the processing to a point where we can reliably make chips with a few tens of thousands of transistors" commented Dmitry Polyushkin (TU Vienna), an author of the work on the Graphene Flagship project page.
Graphene Flagship - https://graphene-flagship.eu