CEA-Leti proves RRAM-based TCAMs viable for neuromorphic processors

December 06, 2018 // By Julien Happich
In a joint paper titled "In-depth Characterization of Resistive Memory-Based Ternary Content Addressable Memories", researchers from French research institute CEA-Leti and from the Institute of Neuroinformatics at the University of Zurich and ETH Zurich have proven the viability of resistive-RAM (RRAM) for network packet routing in multicore neuromorphic circuits.

In the paper presented at IEDM 2018, the researchers detail a compact RRAM layout that can be directly integrated in the Back End Of Line of a 130nm CMOS process, on top of the fourth metal layer, slashing silicon area by a factor of 8 compared to the implementation of conventional 16-transistor Ternary Content-Addressable Memories (TCAM).

TCAM circuits provide a way to search large data sets using masks that indicate ranges, making these circuits useful for complex routing and big data applications, where an exact match is rarely necessary. With TCAMs, stored information can be searched by its content, as opposed to classic memory systems in which a memory cell’s stored information is retrieved by its physical address. This shortens search times dramatically, but due to their relatively cumbersome architecture (16 CMOS transistors), TCAMs' storage capacity is often limited to tens of Mbs in standard memory structures in order to save up valuable silicon real estate.


SEM cross section of the integrated TiN/HfO2 /Ti/TiN RRAM.
Both HfO2 and Ti layers are only 10nm thick.

By replacing the SRAM cells with resistive-RAM (RRAM) in TCAM circuits, the researchers reduced the number of required transistors to two (2T), and to two RRAMs (2R). In addition, they were able to fabricate the RRAMs on top of the transistors, which further reduced the required silicon real estate (hence the 8x shrink).

But coming up with an innovative architecture was not enough, as reliability issues were looming and such RRAMs may not be suitable for every application. What the authors explain is that circuit reliability is strongly dependent on the ratio between the ON and OFF states of the memory cells, and RRAM-based TCAMs have a relatively low ON/OFF ratio (from 10 to 100) with respect to the 16-transistor structure with an ON/OFF ratio about 105, and RRAMs also suffer from a limited endurance with respect to CMOS transistors.

To identify the right trade-offs and overcome these challenges, the researchers clarified the link between RRAM electrical properties and TCAM performance with extensive characterizations of a fabricated RRAM-based circuit. The limited endurance can be overcome by either decreasing the voltage applied during each search, or increasing the power used to program the TCAM cells beforehand. The research showed a trade-off exists between TCAM performance (search speed) and TCAM reliability (match/mismatch detection and search/read endurance).


Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.