Cortus is generally known for having small transistor count, power efficient cores, when implementing its own proprietary instruction set architecture. Typical applications for Cortus-based ASICs are the Internet of Things (IoT), smart cards, smart sensors & industrial control.
The APS3V provides RV32IMC ISA features – that is 32bit integer instruction set, compressed instructions and multiply and divide. In addition, it implements privilege features with machine and user modes.
The implementation requires 17,000 gates and a four-stage pipeline and usually targets replacing the Cortex-M3 as a microcontroller core. In a 40 nm UMC process it is expected to achieve at least 1GHz clock frequency The APS3V processor features a Harvard architecture with AXI-lite bus interfaces. The full tool chain and IDE is available without license fee.
The datasheet is preliminary.
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