The multi-year licensing agreement now covers the full range of UK-based EnSilica’s 16 bit and 32 bit eSi-RISC processor IP, extending the existing relationship. Previous eSi-RISC processor IP has been used by Solomon Systech to power several of its smart touch screen controllers and drivers.
Headquartered in Hong Kong with a technology centres in the UK, fabless chip maker Solomon Systech designs proprietary chips for a wide range of display applications for smartphones, tablets, smart TVs/monitors, notebooks and other smart devices, including wearables, healthcare devices, connected home devices, as well as industrial appliances.
“With eSi-RISC already proven in several of Solomon Systech’s existing products, we are extremely pleased to be extending our relationship by entering into a multi-year licensing agreement that covers multiple projects and multiple architecture implementations,” said David Doyle, Commercial Director for EnSilica. “The performance, features and configurability of eSi-RISC are an ideal match for the enhanced functionality that Solomon Systech is seeking to deliver in its next generation products.”
eSi-RISC is a highly configurable microprocessor architecture for embedded systems that scales across a wide range of applications. With either a 16 or 32-bit, 5-stage pipelined RISC, load-store architecture which is highly configurable and implemented in 8k ASIC gates, the RISC IP core has been used in a variety of ASIC and FPGA technologies. It is available in a choice of von Neumann or Harvard memory versions and uses industry standard bus architectures such as AMBA AXI/AHB/APB for IP interconnection, while intermixed 16 and 32-bit instructions give high levels of code density. eSi-RISC is implemented as a soft IP core, based on synthesisable Verilog RTL and can be ported to a wide range of ASIC processes and FPGAs.