Engineering simulation generates tremendous amounts of data – far more than most organizations can effectively leverage for future product designs. A typical integrated circuit, for example, has billions of variables that can be simulated. At the same time the highly specialized engineering supercomputing resources are not keeping pace with the demand for even higher fidelity simulations needed for increasingly complex products. By leveraging such big data technologies as elastic compute and map reduce, SeaScape provides an infrastructure to address these issues in the context of almost any engineering design objective. ANSYS has collaborated with Intel Corporation to optimize SeaScape to take full advantage of the many-core Intel Xeon® processor and Intel Xeon Phi processor families.
The first product on the SeaScape infrastructure, SeaHawk, is said to dramatically transform electronic product design through significant improvements in simulation coverage, turnaround times and analysis flexibility. The combination of big data techniques and ANSYS’ proven simulation capabilities arms SeaHawk users with a broad range of capabilities to reduce size of the chip and its power consumption without sacrificing performance or schedule constraints.
According to the EDA vendor, early users have realized an average of 5 percent reduction in die size, which could result in millions of dollars of savings during production.
“Die size and development time reduction are targets that electronic design engineers have pursued with marginal success given the limitations of today’s in-design solutions,” said John Lee, general manager, ANSYS. “ANSYS SeaHawk bridges the in-design and sign-off needs by bringing unprecedented simulation performance and design insights without sacrificing sign-off accuracy and coverage. We’re excited to offer SeaHawk to the EDA industry today and equally excited to offer other SeaScape-based products across our entire simulation portfolio in the future.”
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