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Mixed foursome offers RISC-V development support

Mixed foursome offers RISC-V development support

Technology News |
By Peter Clarke



The collaboration combines foundational IP and metal-configurable standard cell technology from BaySand Inc. (San Jose, Calif.), the Codix-Bk RISC-V processor from Codasip Ltd. (Brno, Czech Rep.), on-chip debug and analytics from UltraSoC Ltd. (Cambridge, England) and software development tools from Codeplay Software Ltd. (Edinburgh, Scotland).

Codeplay provides developers with a programming model that extends from device-specific functionalities to machine learning paradigms such as Google’s TensorFlow. Codeplay’s ComputeSuite extends the RISC-V platform with OpenCL and SYCL allowing applications to target the underlying hardware using standard APIs.

The combination covers the ground from bare-metal and IP up through processor, debug, middleware and on to application software.

“Our aim in this collaboration is to enable accelerated product development cycles, lower costs and more agile development, in particular for IoT designs,” said Rupert Baines, CEO of UltraSoC, in a statement.

“Our Codix-Bk series of RISC-V processor IP, with its LLVM-based development environment, make integration quick and low risk, demonstrating the power of commitment to open standards,” said Karel Masarik, CEO of Codasip, in the same statement.

Related links and articles:

www.baysand.com

www.codasip.com

www.codeplay.com

www.ultrasoc.com

News articles:

Codasip, Baysand bring RISC-V processor IP to market

Ultrasoc cores provide ‘bare-metal’ security

SiFive launches first RISC-V SoC

HSA spec upgrade supports multivendor SoCs

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