When I began my engineering courses five years ago, it was still unclear to me where the More Moore versus More than Moore debate would go. At the time, and with as little experience and knowledge I had gained at that point in the ways of processes and device physics, I was convinced that somehow the silicon industry would continue to find ways to shrink and shrink the smallest feature size until we could somehow place each individual molecule exactly where we wanted it. Imagine the possibilities! If we could place every molecule individually in mass production, the kind of repeatability in mechanical and electrical design that we could achieve would be astounding!
Don’t get me wrong, I still have hopes that someday we could do this en masse, but with my more educated view from here I don’t think that’s happening any time in the next 10 years. (Please feel free to prove me wrong!)
It wasn’t until I took a process engineering elective class that I learned the difficulties that we are already having at a mere 16nm feature size. When you get down that small, you already have to deal with wave/particle theory. Mask sets need to have funky cutouts to make corners form correctly. Noise becomes a problem the lower your Vt voltage drops with these smaller feature sizes. Given this was just an undergraduate class, I didn’t learn as much about FinFETs and other creative process technologies being developed to work around these rising problems, but I got enough to understand that these are, for the most part, relegated to research laboratories for the time being.
Moore’s Law has shifted from a historical pattern to a self-fulfilling prophecy. As it gets harder and harder to cram more transistors into the same space, we’ve gotten creative with how we continue to fulfil the law of the industry. But the bubble must burst eventually. Feature size and