According to their simulations, their manufacturing strategy could yield 100 GHz-capable thin flexible RF transistors to be manufactured at low cost and low temperature on large rolls of PET.
Their paper "Fast Flexible Transistors with a Nanotrench Structure" published in the journal Scientific Reports details how they overcome the limitations of conventional lithography.
Rather than try to dope selectively a silicon substrate to pattern transistors, the researchers indiscriminately doped a whole silicon nanomembrane (created from a silicon-on-insulator (SOI) wafer, hence keeping the superior charge carrier mobility of bulk silicon versus typically low-mobility organic materials.
They then used electron-beam lithography to carve out a nano-imprinting mold which they use to imprint an etching mask pattern through a photoresist layer, subsequently used to etch a deep nano trench in the Si NM (100nm wide by 250nm deep). After depositing source and drain electrodes and undercutting the buried oxide to release the Si NM, the active nanomembrane is flip transferred onto an adhesive coated PET substrate. Further dry etching defines the perimeter of the active region, then an Al2O3 gate dielectric and gold gate electrodes are deposited above the 100nm trench to finalise the transistor – see figure 1.
Remarkably, all of the device fabrication processes were carried out at temperatures lower than 150°C (except for the first doping and recrystallization steps performed in a blanket fashion before releasing the Si NM from SOI).