Self-timed logic is Eta Compute's low-power secret

May 02, 2017 // By Peter Clarke
To get to deep sub-threshold voltages – and therefore extreme low power – IP licensor and design services company Eta Compute Inc. (Westlake Village, Calif.) has turned to asynchronous logic.

Eta Compute, a well-connected startup founded in 2015 and with links to Cadence Design Systems Inc., came out of stealth mode recently claiming it could offer Cortex-M3 cores that consume as little as 2 microwatts (see Startup claims lowest power microcontroller with 0.25V operation). Such low power makes battery-operated sensor nodes with life times of months or even years a possibility, the company claims.

"The basic technology we invented is a kind of logic that is self-timed," said Paul Washkewicz, vice president of marketing and sales and co-founder of Eta Compute, in an interview with eeNews Europe. He went on to say that it is a form handshaking, self-timed logic but that the key thing was to be able to make it conventionally testable and to deployable on standard CMOS logic manufacturing processes.

Large SRAMs and such things as analog-to-digital converters are operated clocked and Eta Compute has developed interfaces for these.

Essentially Eta Compute has used its connections and knowledge of Cadence timing sign-off software to develop an asynchronous design flow. Circuits can be created in a conventional manner initially before being recompiled using asynchronous gate libraries developed by Eta Compute. This means that Eta Compute's deep sub-threshold logic can be targeted at multiple manufacturing process nodes – and the company already has libraries for digital processes from TSMC at 55nm, 90nm, 130nm and 180nm.

Circuit development bridges sync-asynch boundary. Source: Eta Compute.

Like any fabless company Eta Compute has been working closely with its foundry but importantly it's technology required no changes to the manufacturing process and the resultant IP is Eta Compute's and protectable.

The self-timing approach produces a number of advantages; not least saving the power on distributing a clock signal. But it also means that when operated at full voltage Eta can achieve comparable performance with clocked circuits but the scaling down is immediately available.

Next: Saving how much power?