A SPICE model for Gate-All-Around transistors

December 03, 2018 // By Julien Happich
During the IEDM 2018 conference, CEA-Leti and Silvaco Inc announced a joint project to create unified SPICE compact models for the design of advanced circuits using nanowire and nanosheet technologies.

The new predictive and physical compact model under development, Leti-NSP, builds on Leti’s 15 years of model development, including the popular Leti-UTSOI model for FD-SOI technology. The Leti-NSP compact model uses a novel methodology for the calculation of the surface potential, including quantum confinement. The model is able to handle arbitrary cross-section shapes of stacked planar and vertical Gate-All-Around (GAA) MOSFETs (circular, square, rectangular). It provides an excellent tool for design exploration of nanowire and nanosheet device architectures.

This three-year collaboration will make the new device models available to designers through SmartSpice, Silvaco’s high-performance parallel SPICE simulator for use by circuit designers.

The corresponding model-parameters extraction flow will be implemented in Utmost IV, Silvaco’s database-driven environment for characterizing semiconductor devices, to ensure an accurate fit between simulated and measured device characteristics.

Accuracy of analysis at the nanometer scale is essential for co-optimization of silicon process technology and circuit performance. Besides accurate device characterization and simulation, a complete solution includes TCAD simulation, and 3D parasitic extraction. Silvaco’s partnership with leading research institutions for atomistic TCAD, and its proven in-house extraction solver technology, will provide the most accurate Design Technology Co-Optimization (DTCO) solution for nanometer technologies.

“Over two decades, CEA-Leti and Silvaco have collaborated on design-technology co-optimization, ranging from innovative TCAD simulation to the design of advanced nanoelectronics, and thus expanded and strengthened Silvaco’s suite of tools for designers,” said Emmanuel Sabonnadière, CEA-Leti CEO.

“This project continues that partnership, and when these physics-based compact models are made available to designers worldwide, they will be able to evaluate the potential of advanced nanowire-based CMOS technologies under development at CEA-Leti.” 

CEA-Leti - www.leti-cea.com 

Silvaco - www.silvaco.com


Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.