The team, including researchers at Stanford University and the US Department of Energy’s (DoE's) SLAC National Accelerator Laboratory, both in Menlo Park, Calif., named their new tin-based material stanene to liken it to graphene (plus the prefix of the Latin term for tin, stannum). However, instead of being based on atomically thin two-dimensional (2D) monolayers of carbon as is graphene, stanene is based on monolayers of tin. And while they are careful not to call it a room-temperature superconductor, it nevertheless has striking similarities.
"This is not a superconductor, with the following distinction -- it only conducts with 100 percent efficiency on the edges -- the interior of this two-dimensional material is an insulator," Zhang told us.
In practice, stanene interconnection lines will behave like dual side-by-side superconducting wires, since each ribbon of stanene will support two lanes of zero resistance data traffic -- one on each edge. The only resistance offered by a stanene interconnection line would be at the end points where a contact must be made with the traditional on-chip circuitry.
"The key difference is that with a normal conductor, the total resistance scales linearly with the length -- the longer the wire the larger the resistance," said Zhang. "But for stanene the only resistance is the contact, so the total resistance of a line is constant regardless of the wire's length."
Experiments to confirm Zhang's group's simulations are currently underway in Germany and China, and if they succeed in fabricating stanene and confirm its properties, that could be good news for chip makers, since switching to thin ribbons of stanene for high-speed interconnects could cut chip power and