Supercomputer chip delivers over 2.7 TFLOPS for HPC and AI developments

August 22, 2018 // By Julien Happich
Fujitsu's A64FX is the world's first CPU to adopt the Scalable Vector Extension (SVE), an extension of Armv8-A instruction set architecture for supercomputers, according to the Japanese company who designed it to be featured in the post-K computer, a supercomputer being developed by Fujitsu and RIKEN as a successor to the K computer (best HPC performance in 2011).

Building on over 60 years' worth of Fujitsu-developed microarchitecture, this chip offers peak performance of over 2.7 TFLOPS. The post-K, which is anticipated to be over 100 times more powerful than the K computer, should start operation around 2021. 
Fujitsu collaborated with Arm, contributing to the development of the SVE as a lead partner, and adopted the results in the A64FX. With hardware technology that draws out the high memory bandwidth of high performance stacked memory, the system can efficiently utilize the CPU's high functional computational processing units, enabling delivery of high application execution performance.

The CPUs will be directly connected by the proprietary Tofu interconnect developed for the K computer, improving parallel performance. The system can provide a peak double precision (64 bit) floating point operations performance of over 2.7 TFLOPS, with a computational throughput twice that amount for single precision (32 bit), and four times that amount for half precision (16 bit). In other words, by using single precision or half precision operations, applications can get results even faster. Fujitsu has also enhanced computational performance for 16 bit and 8 bit integer operations. Accordingly, this CPU is suited for a wide range of fields such as big data and AI, not just for the computer simulations at which traditional supercomputers excel. 

Fujitsu -  www.fujitsu.com


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