Test Circuit for Direct Gate Driver Circuit Damage without Energy Limit
Another test simulating the worst-case condition was performed, wherein the destructive energy was applied directly to the input and output chips of the gate driver. During this destructive test, the fully charged bulk capacitor was directly connected to the output pin of the gate driver (Figure 4). This test exhibited the worst possible overstress, and thus examined the isolation withstand capability. The energy flowed directly into the driver circuit while the gate resistor was the only power limiting device. The relay, S2, coupled the high voltage into the gate driver output circuit.