Three-level flash gives way to four in bid for greater capacity: Page 2 of 5

April 09, 2019 //By Daniel Zajcev
Three-level flash gives way to four in bid for greater capacity

For example, the number of electrons in a flash cell with a lithography of 16nm is around ≤20. A multi-level-cell (MLC) NAND flash has four fixed voltage levels. Each fixed voltage level represents one of the following binary codes: 00, 01, 10, 11. With each successive program and erase cycle the risk of electrons being trapped between the substrate and control gate increases. The more electrons are trapped the higher the chance of voltage levels not being correctly read out by the controller. Without complex controller and firmware features, such as error correction code, the data on the NAND flash would be corrupt and unusable. In the worst case, if the NAND flash contained essential booting data for the operating system, the system put simply, 2D NAND flash has reached its physical limitations. Any further shrinking would undermine the reliability, endurance and data retention of the NAND flash.

From an economical perspective, the market requires storage devices with higher capacities and better performance as our world is becoming more data-centric. Estimations project that an average connected person will interact with smart devices nearly 4800 times per day and that by 2025 163 ZB of data will be created on an annual basis. The unprecedented growth of smart devices in combination with artificial intelligence requires hardware that is capable of handling more storage, processing and analysing of data.

Vendors have taken two major steps to fulfil the markets requirement for larger capacities at an affordable price while at the same time delivering high reliability, uncompromised data integrity and consistent performance.

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