Three-level flash gives way to four in bid for greater capacity: Page 3 of 5

April 09, 2019 //By Daniel Zajcev
Three-level flash gives way to four in bid for greater capacity

The first method by vendors to increase storage density was the introduction of a third NAND dimension: multilevel storage. The first NAND flash memories only had a single-level cell (SLC) architecture, and were therefore only capable of storing one bit per memory cell. This was followed by the multi-level cell (MLC) and the triple-level cell (TLC) architectures, which can store two or three bits, respectively. In the MLC, four voltage levels are used to represent the four possible combinations of two binary digits, while the readout circuitry of a TLC has to reliably distinguish between eight discrete voltage levels to capture the three bits of stored data.

Overview of the different NAND flash technologies
and their possible states per memory cell.

The second and more revolutionary method by vendors was to move from the traditional planar NAND structure to a three-dimensional architecture. This architecture is capable of higher areal density in comparison to 2D NAND and provides room for scalability in the future. Just like a skyscraper can shelter more people in comparison to a single storey house, so too can a 3D-NAND flash cell store more data than a 2D flash cell. By having better areal density, vendors can scale to larger capacities by delivering more gigabytes per wafer. This technological leap allows vendors to already produce SSD drives that can go all the way up to 64 TB. Regarding reliability and quality, the BiCs3 NAND flash from Toshiba delivers the same amount of program and erase cycles in comparison to the Toshiba 15nm 2D MLC. However, the price to performance ratio is the key advantage of the technology.

Such three-dimensional NAND (3D NAND) flash memories have therefore taken what was a linear ‘string’ of flash cells making up a word line in a 2D memory array and, conceptually speaking, folded them up into the third dimension in form of a U shape, with each cell being defined by alternating layers of material. The more discrete layers of material that can be laid down by the manufacturing process, the more discrete flash cells can be built in the same die area. Hence the greater the device’s overall capacity.

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