Figure 1 shows a comparison between SOTB and many of the various processes used to implement microcontrollers available today, at various process geometries.
We can choose to use an advanced process node, typically with a line width of 40 nm or the even smaller widths available today. Here we have the advantage of being able to offer products with high levels of peripheral integration, including large on-chip flash memories of over 2 Mbytes, along with high clock rates. Operation in excess of 200 MHz is not uncommon for such a process. However, while the active switching current of such a process is typically very low at around 50 - 100 µA/MHz, the leakage current from each gate in such a small process width is very high. This results in extremely high standby currents, typically 10 - 100 µA or more.
For many applications, especially those that use a battery or require energy harvesting techniques, lower leakage is probably the most important parameter at such low current standby modes. If this is the key requirement for the design, we typically have to choose a process with a larger line width. This restricts these modules in terms of both the performance and the level of integration of memory and other peripherals. Clock rates of less than 80 MHz are typical with memory sizes normally restricted to less than 512 Kbytes.
Typically, these processes may have active modes with current consumption in the range of 250 – 500 µA/MHz, while the leakage currents can be in the range of a few hundred nA.
The new SOTB process can now offer active mode current of less than 20 µA/MHz and leakage currents down to 150 nA, while still allowing the development of devices with reasonably high clock rates, large embedded flash memories and SRAMs on chip.