
100GbE transceivers with Multilink Gearbox functionality
The 88X5111 line interface is fully compliant with IEEE 802.3BJ and supports the Reed Solomon Forward Error Correction (RS-FEC) function required for 100G-CR4, 100G-KR4 and 100G-SR4 operation, as well as auto-negotiation and coefficient training protocol required by IEEE 802.3 standards. The 88X5111 currently is sampling to global customers and will be sold as a standalone PHY, as well as with Marvell switches.
Michael Zimmerman, Vice President and General Manager, Connectivity, Storage and Infrastructure (CSI) Business Unit at Marvell said, "As the latest addition to our Alaska C family, the 88X5111 is unique in its support for all 100GbE media types – 100G-LR4 and SR4 optics, 100G-KR4 backplanes, and 100G-CR4 passive copper cables, giving flexibility in deployment that is critical to the end user. In addition, the Multilink Gearbox functionality integrated into the 88X5111 enables next generation switch ASICs with 25G/s I/Os to support 10GbE and 40GbE ports in a power- and cost-efficient manner."
Manufactured with 28 nanometer lithography in a 17-mm x17-mm package footprint, the 88X5111 is a fully integrated single chip Ethernet transceiver that performs all physical layer functions required for 100Gbps Ethernet Gearbox functionality, and drives 100Gbps full duplex transmission, over a variety of media. Its MLG functionality aligns with OIF MLG 2.0 specifications, enabling aggregation of 10 independent streams of 10Gbps Ethernet or two independent streams of 40Gbps Ethernet to be multiplexed onto a 4x25Gbps stream.
The 8X5111 also connects to a Media Access Control (MAC) or switch over a 10x10Gbps CAUI-10 link on its host interface. These transit drive and receiver equalization capabilities significantly exceed CAUI-10 requirements and meet 10GBase-KR specifications. The line interface of the 88X5111 is fully compliant to the IEEE 802.3BJ standard that defines the physical layer specifications for 100Gbps operation over backplanes and copper cables. The device supports the RS-FEC feature, as well as auto-negotiation and coefficient training protocol required by the 802.3BJ standard. Additionally, internal registers can be accessed via a management data input/output serial management interface, which is compliant with IEEE 802.3 specification. The device includes internal PRBS generators, and Ethernet packet generators and loopbacks to assist with testing and debugging.
