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1080p60 sensor-to-processor chip reduces video system size and power consumption

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By eeNews Europe

Compared to existing FPGA-based solutions, the SN65LVDS324 lowers the bill-of-materials (BOM) by 20 percent, reduces system power consumption by more than 10 percent and shrinks package size by 50 percent. It provides full HD, 1080p60 image quality in a host of video capture applications, including surveillance IP cameras and video conferencing systems, as well as industrial, consumer and professional video recording equipment.
As a dedicated bridge for video streams between HD image sensors and processors, the SN65LVDS324 lowers BOM costs by up to 20 percent compared to existing FPGA-based solutions and in 1080p60 system implementations, it typically consumes less than 150 mW, reducing system power consumption by more than 10 percent.
The dedicated function provides a 50-percent smaller package than current FPGAs and it supports a wide range of resolutions and frame rates, up to 1080p60-full-HD to maximize system performance.
The SN65LVDS324 is an extension of TI’s FlatLink and FlatLink3G serial interface technology, which reduces the number of signal lines used for synchronous parallel data bus structures with no loss in data throughput. It is also optimized to work with a variety of processors, including TI’s OMAP and DaVinci processors for video applications.
The SN65LVDS324 is available in a 4.5-mm by 7-mm, 59-ball PBGA (ZQL) package. Suggested retail pricing in 1000-unit quantities is US$2.65.
For more information and to order samples, visit https://www.ti.com/sn65lvds324-pr-eu.


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