10nm FPGAs offer customized connectivity and acceleration for data-centers
The new family of FPGAs provides the flexibility and agility required to meet the evolving standards in AI analytics performed at the edge, network and the cloud, with varying AI workloads, and multiple functions. The new devices combine an FPGA fabric built on Intel’s 10nm process with heterogeneous 3D SiP technology, integrating analog, memory, custom computing, custom I/O, and Intel eASIC device tiles into a single package with the FPGA fabric. This offers customers a custom logic continuum with reusable IPs through a migration path from FPGA to structured ASIC. One API provides a software-friendly heterogeneous programming environment, enabling software developers to easily access the benefits of FPGA for acceleration.
Intel claims the device is the industry’s first FPGA to support Compute Express Link, a cache and memory coherent interconnect to future Intel Xeon Scalable processors. Thanks to its 2nd Generation HyperFlex ArchitectureDSP, the Intel Agilex FPGA is said to deliver up to 40% higher performance, or up to 40% lower total power consumption compared with Intel Stratix 10 FPGAs. An industry first, the FPGA supports hardened BFLOAT16 and up to 40 teraflops of digital signal processor performance (FP16). The devices come with PCIe Gen 5 connectivity and its transceivers support up to 112 Gbps data rates. Advanced memory support includes DDR5, HBM, and Intel Optane DC persistent memory.
Intel – www.intel.com