130nm Fit Fast Structured Array development platform

130nm Fit Fast Structured Array development platform

By eeNews Europe

The FFSA devices have a common silicon-based master layer that is used in combination with upper metal layers that are reserved and allow device customization. By limiting the customization to the metal layer masks, it also reduces development cost. Samples and mass-produced devices can be delivered in a shorter time than for conventional ASICs. The 130nm node process offer different master slices for up to 664kb of RAM and around 912,000 gates per device.

Devices designed on the platform will be manufactured by Japan Semiconductor, a subsidiary of Toshiba Electronic Devices & Storage Corporation with a proven record of expertise in manufacturing ASIC, ASSP and microcomputers. This will ensure long-term supply continuity and meet or exceed the needs of customer business continuity plans.

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