16-bit, quad, IF DAC reaches 2.8 Gsamples/sec
AD9144 features 82-dBc spurious-free dynamic range (SFDR) and a maximum sample rate of 2.8 Gsamples/sec permitting multicarrier generation up to the Nyquist frequency. With -164 dBm/Hz noise spectral density, the AD9144 enables design of higher dynamic range transmitters. Its advanced and proprietary low SFDR and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. A JESD204B eight-lane interface and low inherent latency of under two D/A converter clock cycles simplifies hardware and software system design while allowing for multichip synchronisation.
The combination of programmable interpolation rate, high sample rates and low power at 1.5 W gives system designers flexibility when choosing D/A converter output frequencies. This is helpful in meeting four- to six-carrier GSM transmission specifications and other communications standards. For six-carrier GSM IMD, the AD9144 operates at 77 dBc at 75-MHz IF. Operating with the on-chip PLL (phase-locked loop) at a D/A converter output frequency of 30 MHz, the AD9144 delivers a 76-dB adjacent-channel leakage ratio (ACLR ) for four-carrier WCDMA applications.
The AD9144 includes integrated interpolation filters with selectable interpolation factors of 2, 4, and 8. The dual D/A converter data interface supports word and byte load allowing customers to reduce input pins on lower data rates to save board space, power and cost.
An evaluation board has an FPGA Mezzanine Card (FMC) connector, software, tools, SPI controller and reference designs. VisualAnalog software combines simulation and data analysis tools with a graphical interface allowing designers to customise their input signal and data analysis. The AD9144BCPZ costs $80.00 (1000).
Analog Devices; www.analog.com/AD9144
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