19x19x3.9mm unit stacks FPGA, NAND flash and mDDR
Integrating a Spartan-6 FPGA with a PCI Express endpoint along with two mDDR low power memories, one SPI NOR flash for secure boot and 167 decoupling capacitors in one unique device, the company is offering designers a drastically reduced footprint, with a reduced pin count of 484 balls compared with the original FGPA footprint of 676 balls.
Considering the overall footprints of the memories, FPGA and decoupling capacitors taken separately, the Fusio-II does provide a footprint reduction from 937 mm2 down to 361mm2 (without mention of extra layout space for high speed signal integrity).
The fully tested and validated subsystem can be directly placed on a board and connected to dedicated peripherals.
Fusio-II main characteristics:
Spartan®-6 XQ6SLX150T FPGA with high speed serial connectivity offering an integration of up to 147 443 logic cells.
4 High speed GTP serial transceivers characterized at 2.5Gbp/s, which can be configured as a PCI-express endpoint.
2x128Mbits of low power mDDR operating at 166 MHz.
167 decoupling caps providing optimum filtering for each 10 power supplies
203 multi-purpose User I/O through three independent banks
The Fusio-II module comes in commercial (0-70°C) and industrial (-40°C/ +85°C) temperature range.
Visit 3D PLUS at www.3d-plus.com
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
