1MHz EEPROM series feature I2C interface and densities up to 1Mbit
All EEPROMs feature a double cell structure to eliminate accidental failures, and a double protection circuit to prevent writing errors. This makes them suitable memory solutions for a wide range of devices such as consumer, industrial and automotive applications. Rewriting is performed by passing electrons through a tunnel oxide film. This, however, causes deterioration of the film, eventually leading to memory failure where the memory cell data is locked at ‘1’ and cannot be rewritten to.
Rohm’s double cell structure prevents this by allotting two cells for each memory bit, connected in an OR configuration so that the second cell is able to operate upon failure of the first. All LSIs become unstable during power ON and OFF: EEPROMs are even more susceptible to failure, making it impossible to even recover from one malfunction. In response to this, Rohm has integrated a double protection circuit consisting of a Power ON Reset (POR) block that resets during start-up and a Low Voltage Write Error Protection Circuit (LVCC) that prevents write operations and resets during low voltage conditions (LVCC and below).
Data can be rewritten up to 1.000.000 times and stored for 40 years. The new devices can be delivered in standard packages such as SO8 and TSSOP8. All control functions are available through two ports of the serial clock (SCL) and serial data (SDA).
Visit Rohm Semiconductor Europe at www.rohm.com/eu
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