25G/50G low-latency Ethernet MAC optimized for Xilinx Ultrascale+ transceiver
“With Xilinx Ultrascale+ transceivers reaching up to 30.5 Gbps, 100 Gigabit Ethernet connectivity will become a reality. This is reflected in the fact that Xilinx has integrated hard macros for 100GE MACs into their devices”, says Johannes Fischer, head of the Digital Signal Processing group at Fraunhofer HHI. However, many high-performance embedded, test and measurement or automotive applications are fully covered by more cost-effective 25G or 50G Ethernet. Fraunhofer HHI’s MAC Soft-IP-Core with low latency is dedicated to this gap.
Fraunhofer HHI’s 10GE MAC IP-Core is an Ethernet Media Access Controller (MAC) with low latency in accordance with the IEEE 802.3-2008 standard, specifically designed to achieve the lowest possible latency while being as resource-efficient as possible. The 10GE MAC IP-Core is listed in the Xilinx Intellectual Property Library (IP) at https://www.xilinx.com/products/intellectual-property/1-o0w4k1.html
The 25GE MAC IP-Core is scheduled for release at the beginning of Q4 2017; its 50GE MAC IP-Core counterpart will be released later this year. The supported family of devices includes Xilinx Virtex UltraScale+ Kintex UltraScale+ Zynq UltraScale+ and MPSoC Virtex.
More information:
https://www.missinglinkelectronics.com/index.php/menu-products/low-latency-10-gi…
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