28nm CMOS 100G Ethernet/OTN PHYs withstand up to 32dB of channel loss
These devices incorporate Avago’s unique proprietary Decision Feedback Equalization (DFE) architecture providing low overall power consumption, low data latency and best-in-class jitter and crosstalk performance.
The Vortex Gearbox AVSP-1104 is a single-chip PHY IC suitable for driving both backplane and portside applications. It has a long reach performance withstanding up to 32dB of channel loss and provides hole-free operation from 1 to 28Gbps. It offers gearbox functionality for full-duplex conversion of four lanes (4×25 Gbps, 4×28 Gbps) to ten lanes (10×10 Gbps, 10×11 Gbps). The chip can be configured as a retimer function for full-duplex transmission of ten lanes. It supports programmable Tx/Rx equalization of all its SerDes interfaces and has a Bit Error Rate (BER) of 1e-20. Easy-to-use diagnostic software enables remote debugging. Samples of the AVSP-1104 are available now in 320-pin fcBGA package.
Visit Avago Technologies at www.avagotech.com
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