Joining their expertises, the two partners have developed a near-threshold 0.5V ecosystem, making available a complete process design kit along with a range of mixed-signal silicon IPs and key analogue IP blocks to design ultra-low power ICs. MIFS’ DDC technology is well adapted to low-power applications, while its immunity to random dopant fluctuations makes it suitable for low-voltage operation. However, low-voltage operation is still subject to process and temperature and other variations. To overcome the impact from these variations CSEM and MIFS applied a variety of design techniques and implemented Body-bias-based Adaptive Dynamic Frequency Scaling (ADVbbFS) as one of the key IPs. Using a 55nm CMOS process, the partners prototyped a 32-bit RISC microcontroller which they demonstrated could run drawing only 2.5uW/MHz, a new world record, they claim.
Such RISC MCUs could easily run from ambient energy harvesting, whether it be thermal, solar, vibrational, radio or any combination of those.
CSEM – www.csem.ch