3D packaging drives $11.9 billion capex
Leading companies’ capital expenditure on high-performance packaging was about US$11.9 billion in 2021, according to Yole Developpement (Lyon, France).
And this is intended help those companies serve a market for such packaging worth about US$2.74 billion in 2021, the market analyst said. This market is set to increase in value with a compound annual growth rate of 19 percent over the period to 2027. By then the high-end packaging market will be worth US$7.87 billion in that year, Yole predicts.
High-end performance packaging market size by technology and growth 2021 to 2027. Source: Yole Developpement.
In 2021 Intel was the top investor spending US$3.5 billion in support of is Foveros and EMIB technologies. Foveros is Intel’s 3D chip stacking technology, which consists of stacking a die on an active silicon interposer. It’s 2.5D packaging uses an embedded multi-die interconnect bridge (EMIB) based on a 55-micron bump pitch. The combination of Foveros and EMIB gives birth to Co-EMIB, which has been used for the Ponte Vecchio graphics processor.
The other leader is foundry TSMC, which spend US$3.05 billion on packaging capex in 2021.
TSMC is defining new system-level roadmaps and technology for 3D system-on-chip components. Its CoWoS platform offers silicon interposers, while its LSI platform is a direct competitor for EMIB.
Companies by 2021 high-end performance packaging capital expenditure. Source: Yole Developpement.
ASE spent US$2 billion capex is the biggest and only pure-play packaging company trying to compete with the foundries and integrated device manufacturers. With its FoCoS product, ASE is also the only OSAT with an ultra-high density fan-out solution at the moment.
Samsung has its I-Cube technology, which is similar to CoWoS-S. Samsung is one of the 3D-stacked memory solution leaders, providing high-bandwidth memory (HBM) and 3DS. Its X-Cube will use hybrid bonding interconnects.
Related links and articles:
News articles:
Samsung improves interposer-based packaging
Intel invests $3.5 billion in chiplet packaging
TSMC preps for ‘chiplet’ style manufacturing in 202
Chiplet-savvy TSMC to build $10 billion assembly and test plant
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