5nm IP for automotive chip designs

5nm IP for automotive chip designs

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By Nick Flaherty

Synopsys has launched a portfolio of automotive-grade interface and foundation IP for TSMC’s 5nm N5A process technology.

The Synopsys 5nm automotive IP is aimed at chip designers developing the next generation of software-defined vehicles by enabling long-term reliability and high-performance compute requirements of automotive system-on-chips (SoCs).

The N5A IP is designed and tested to the AEC-Q100 reliability and automotive Grade 2 temperature standards for ambient -40°C to 105°C, helping to ensure reliability of advanced driver assistance systems (ADAS), highly automated driving (HAD) systems, and zonal SoCs.

The IP also meets the ISO 26262 standard for random hardware faults, enabling automotive OEMs, Tier 1s, and semiconductor companies to accelerate the development and assessment of safety-critical SoCs. The offering includes logic libraries, embedded memories, GPIOs, SLM PVT monitors, and PHYs for LPDDR5X/5/4X, PCIe 4.0/5.0, and USB.

MIPI C-PHY/D-PHY and M-PHY IP is increasing important for camera sensor chips, while 10G USXGMII Ethernet interface IP is key for high speed networks around the vehicle.

Previous automotive-grade Synopsys IP has been integrated into more than 100 ADAS chips and is part of Synopsys’ automotive SoC and software development offering that includes design, verification, electronics digital twin, and prototyping solutions to accelerate development of chips for software-defined vehicles.

“TSMC has worked closely with our design ecosystem partners to provide the automotive semiconductor industry with cutting-edge solutions in IP, EDA, and manufacturing technologies,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC.

“Synopsys’ portfolio of automotive-grade IP for TSMC’s N5A process enables automotive chip innovators to accelerate the design of their safety-critical SoCs while taking advantage of N5A’s significant performance, power efficiency, and logic density boost.”

“New generations of automotive SoC designs will need to support massive amounts of safety-critical data processed at extreme speeds and with high reliability,” said John Koeter, senior vice president of marketing and strategy for IP at Synopsys.

“Synopsys’ high-quality, automotive-grade Interface and Foundation IP on TSMC’s N5A process enables automotive OEMs, Tier 1s, and semiconductor companies to minimize IP integration risk and help meet the required functional safety, performance, and reliability levels for their SoCs.”

Synopsys Automotive-Grade IP on the TSMC N5A process is available today.

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