A clean MIPS slate for academia
The company is not only opening up its RTL code for all to scrutinize, it has come up with a full teaching package with an FPGA-ready deliverables under the name MIPSfpga.
eeNews Europe caught up with Robert Owen, Imagination Technologies’ Worldwide University Programme (IUP) Manager to understand how the company came around this bold decision regarding IP disclosure.
“The MIPS architecture was originally developed at Stanford University in the early 1980s. It has been the teaching architecture of choice for decades because of its elegant true RISC design, epitomized by Dr. David A. Patterson and Dr. John L. Hennessy in their book, ‘Computer Organization and Design’”, likes to remind us Owen.
“Many computer science and computer engineering courses teach CPU architecture based on MIPS which has been much publicized and well documented since its first inception in academia”, noted Owen, “so it is not as closely guarded a secret as other processors, and in most cases, researchers know what is inside”.
Owen admits it was not an easy decision to take, and that letting free and open access to a fully-validated, current generation MIPS CPU, with non-obfuscated RTL code, yields some risks of fraudulent use.
“Users that sign up our program have to accept a license whereby they are not allowed to turn the code into silicon for commercialization. Because they can get into the core, if they modified it and wanted to use a customized version, they would have to consult us”, clarified Owen. “It is possible that this would trigger some illegal copies, but we’ll monitor foundries closely” he added.
Owen sees this new program as a way to re-energize the use of MIPS in education.
“MIPS has been around in academia for a long time, but its use has been fading slowly”, explains Owen. “Academics are often disconnected from the commercial world, and most of them are not even aware that MIPS was acquired by Imagination Technologies who is now investing a lot to develop the architecture further with lots of new clever ideas, so it is important that we make a statement, carry-on using MIPS, it has a bright future”.
Through MIPSfpga, Imagination is providing universities with a simplified version of its popular MIPS microAptiv CPU core which has been configured by an academic specifically for academic use. The CPU has all the features (MMU, cache controllers, debug interfaces, etc.) required to run a full blown operating system (e.g. Linux).
This is contrast to other university programs where the core is usually encrypted (i.e. a black box) and can only run a simple RTOS.
It is offered as part of a complete free-to-download package for universities, together with a Getting Started Guide, teaching guide for professors, and examples designed to enable students to see how the CPU works and explore its capabilities.
“To be a success, such an initiative much reach two objectives: be useful to teachers, and offer long term commercial benefits for the company”, explained Owen, emphasizing that all the teaching material had be written by academics for academics rather than being sourced from in-house training material.
“This represents a significant investment for a company the size of Imagination Technologies, several hundred thousand dollars, a dozen people involved and myself working full-time on this” he added.
Imagination Technologies will also offer active technical support to ensure teachers start from a known good position rather than from MIPS-like or MIPS-compatible architectures.
With the materials, students can develop a CPU and take it through debug, running on an FPGA platform. The MIPSfpga deliverables were developed by Dr. David Harris and Dr. Sarah Harris, professors who co-wrote the popular book, ‘Digital Design and Computer Architecture’, now in its second edition. Dr. David Harris configured the MIPS CPU at the heart of MIPSfpga, and Dr. Sarah Harris developed the teaching materials.
This MIPS CPU configuration is designed to run on a low-cost FPGA platform, with guides available for the Digilent Nexys4 platform with a Xilinx Artix-7 FPGA, and the Terasic DE2 platform with an Altera Cyclone FPGA.
It could take five to ten years before Imagination really gets a return on its investment, but this is part of the company’s long term strategy to meet a significant growth target with MIPS. Owen expects that when a whole generation of students having studied the real MIPS will move to engineering roles, the sales effort will be significantly eased for a product they already know.
The MIPSfpga CPU and related materials are available for download from the Imagination University Programme website now for first phase users via an application process. Academics should visit https://community.imgtec.com/university to register for the IUP and learn more.
Phase two, starting in June, will require only a simple click-through agreement. Additional teaching materials are being developed and will be made available later this year.
Imagination is also working with Xilinx through its University Program to roll out MIPSfpga to universities worldwide, co-sponsoring workshops for professors to get started.
Visit Imagination Technologies at www.imgtec.com
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