A next-generation radio digital front-end solution for mobile broadband infrastructure
To provide equipment that meets all these disparate needs, manufacturers of wireless infrastructure equipment are looking for solutions that provide greater levels of integration, lower power and cost, but also increased flexibility. The goal is to manufacture equipment that meets the needs of more than one operator while shortening time-to-market. In this article, we’ll analyse how a new device from Xilinx, the Zynq™ Extensible Processing Platform (EPP), will help solve these problems for the equipment manufacturers.
The availability of smartphones, tablets and data dongles is driving an explosion in the demand for high-speed, ubiquitous data. In their quest to provide it, network operators are being forced to construct more and more cell sites with an increasing number of antennas per site, using the latest generations of air interface standard such as LTE or LTE-Advanced. Furthermore, the continued decline in average revenue per user (ARPU) has the operators seeking significant cost reductions each year from equipment vendors. To make matters worse, these new networks may have to augment existing voice and data networks that may be based on GSM or UMTS and deployed at different frequency bands.
Adding antennas to support multiple frequency bands, or to increase data rates through multiple-input, multiple-output (MIMO) techniques, is costly but necessary for operators. To reduce the impact on the operational costs associated with the radio mast, equipment manufacturers are looking at methods to reduce the equipment’s footprint—that is, its volume and weight—while also achieving lower cost and power. They are continually innovating in the radio transmission domain, from antennas and diplexers/triplexers to the radio itself, in an effort to reduce the mast footprint.
There are a number of options that meet the needs of the operators. One is to use multiband antennas, thereby reducing the number of antennas needed to service multiple networks based on GSM, UMTS or LTE. Complementing those multiband antennas, operators can install remote radios on the mast to serve the required frequency bands. Remote radios must also continue to evolve to support multiple air interfaces and wider bandwidth, with less weight and smaller mechanical enclosures, if they are to meet the future needs of operators.
The emergence of antenna-integrated radio is another option. Here, the radio electronics are combined within the antenna enclosure to create a fully integrated radio and antenna, eliminating the need for a separate remote radio and delivering the minimum mast footprint. A further stage of evolution of radio electronics and antenna housing is the recent availability of active antenna systems (AAS). These complex antennas require much greater levels of radio signal processing, providing a capacity increase to the network along with the minimum mast footprint.
Key to reducing the size and weight of the remote radio or antenna is the further integration of the radio electronics. Additionally, in order to support multiple air interfaces such as GSM, LTE, UMTS and others, the radio equipment must be highly flexible and programmable.
Let’s review how these radio units could be made more programmable, while providing greater levels of integration.
Figure 1 illustrates a typical radio’s architecture and functions. The baseband interface links the system to the copper optical fibres by means of the baseband processing cards, located either at the base of the mast or elsewhere in the cloud. These interfaces typically require high-speed serializer/deserializer (serdes) components running at up to 9.8 Gbits/second (Gbps) for the Common Public Radio Interface (CPRI).
The signals received at or transmitted to the baseband units need significant digital processing, both before and after they are sent to or come in from the analogue domain. The signal processing required consists of digital up- and downconversion (DUC/DDC), crest factor reduction (CFR) and digital predistortion (DPD). While the DUC/DDC handles the upsampling and shaping, the CFR and DPD are primarily used to increase the radio unit’s transmission efficiency by employing digital processing to linearize the power amplifiers.
Interfacing to the data converters (DACs and ADCs) is achieved by using either high-speed parallel LVDS signaling or an emerging protocol known as JESD204[A/B].
The radio frequency (RF) area contains all the modulators, clock synthesis devices, filters and amplifier circuits that transmit and receive the digital signals to the antennas through power amplifiers.
Control of the whole radio comes in the form of a microprocessor, typically running a real-time operating system such as Linux or VxWorks. This operation and maintenance function takes care of the unit’s alarms, calibration, messaging and overall control—a job that generally requires a large amount of interfacing to other components, such as SPI/I²C, Ethernet, UARTs and of course memory.
Traditionally, suppliers have implemented digital radio signal processing using a combination of ASIC, ASSP and FPGA devices. ASIC devices have the least flexibility and often result in features being omitted due to specification lockdown early in the design cycle. They do often deliver the lowest device cost—but at the expense of high development and NRE costs, and poor time-to-market. ASSP devices tend to have limited flexibility in the sense that they are often designed for a number of use cases, but may not be applicable to others. FPGAs have seen an increased use in digital radio due to their inherent flexibility, which makes them able to support whatever the equipment needs while providing the ability to continually deliver new features as customer requirements become known. In many cases FPGAs are found next to ASICs and ASSPs in these applications, to provide features these other devices lack.
Figure 2 illustrates construction of a 2×2 radio using a combination of ASSPs, FPGAs and microprocessors.
ASSPs are often slow to adapt to the needs of the market, demonstrated by the absence in them of any serial interfacing technology such as CPRI or JESD204. This necessitates a companion device such as an FPGA with built-in serdes, or a low-cost version leveraging external serdes to complete the implementation. Such a setup, however, demands a large number of components. The PCB space is large, the power supply complexity high, and overall power and cost high.
No wonder, then, that equipment vendors are seeking an alternative method.
Xilinx® products have continued to evolve, reaching a point where equipment manufacturers can implement all the digital radio hardware and software in a single device. These FPGAs have full hardware and software programmability along with a suite of communication peripherals hardened for low cost and power. This new device family capable of such integration is called the Zynq Extensible Processing Platform (EPP), available today from Xilinx.
The Zynq EPP, shown in Figure 3, provides dual ARM® Cortex™-A9 processor cores capable of up to 2000 Dhrystone MIPS per core, with a double-precision floating-point unit. Included in the processor subsystem are dedicated communication peripherals such as memory controllers, Gigabit Ethernet, UARTs and SPI/I²C. Adjacent to the processor subsystem is the high-performance programmable logic containing 500-MHz DSP blocks, 12.5-Gbps serdes and abundant internal RAM. Multiple wide, low-latency, high-bandwidth buses connect between the processor subsystem and the programmable logic, while shared memory interfaces ensure that no performance bottlenecks occur.
Figure 4 illustrates how equipment makers could use Zynq to implement all of the functionality required in present-day remote radios. Using the processor subsystem available on Zynq, it’s possible to implement the scheduling, calibration, messaging and overall control on one of the available ARM processors. With the other ARM processor, designers could implement coefficient calculation often used in DPD designs. Many of the required peripherals necessary to complete the solution are also hardened, such as memory controllers, SPI/I²C, UARTs, Gigabit Ethernet and GPIO, saving power and cost, with no impact on the programmable logic fabric.
Complementing the processor subsystem, the programmable logic is used to implement the high-performance signal processing required of present and future wideband radios. The DSP blocks ensure the digital filters required in DUC/DDC, CFR and DPD designs are implemented efficiently and with lower power. Interfacing
to the DACs/ADCs are the device I/Os using LVDS, or serdes using JESD204. CPRI interfacing is also implemented on available serdes.
The benefits of using Zynq are significant. Figures 5 and 6 illustrate the savings in cost and power this architecture can achieve, compared with off-the-shelf ASSPs. This example assumes 20-MHz signal bandwidth, with two transmit and two receive paths. Zynq can also support much wider bandwidths and a greater number of antennas.
For this 2×2 20-MHz LTE example, the Zynq solution provides up to 50 percent savings in power, with an overall materials-cost reduction of 35 to 40 percent over an equivalent ASSP implementation. Furthermore, Figure 7 also shows how the reduction in component count results in a saving in packaged area of up to 66 percent over the example in Figure 2, to the same functionality presented in Figure 4.
This allows a large reduction in the required PCB footprint. Equipment vendors are now able to dramatically shrink the equipment, allowing greater levels of integration with a significantly smaller mast footprint than previously possible.
There are many other major benefits of using Zynq. Zynq reduces power supply complexity and cost, while increasing unit reliability. This increase in reliability has an impact on back-end costs associated with field returns, and allows for greater network reliability. In addition, lowering the power draw also reduces the thermal dissipation and makes it possible to use smaller, lighter heat sinks and mechanics. Finally, the Zynq solution also combines full flexibility in both hardware and software, allowing unit specifications to be locked down later in the design cycle. This reduces time-to-market, mitigates risk and supports new features long after the equipment has been shipped.
Conclusion
The explosion in demand for ubiquitous high-speed data is driving continued innovation in tower-mounted antenna and digital radio solutions. All of these solutions have one thing in common – the need to be smaller, lighter, lower in cost and in power, but at the same time, highly integrated and with high levels of flexibility to cater to the differing demands of the networks.
With its dual-core processor subsystem and high-performance, low-power programmable logic, Zynq is the solution to many of the challenges equipment vendors now face as they strive to serve the network operators. Whether the equipment is a remote radio, antenna-integrated radio or active antenna, the Zynq EPP offers the unparalleled ability to create products with maximum flexibility, maximum integration and the lowest overall cost, power and weight. For more information on the Xilinx Zynq EPP product, please visit www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm.
In addition to FPGA and EPP devices, Xilinx also provides high-performance IP cores for radio in the form of DUC/DDC, CFR and DPD signal-processing solutions, along with connectivity solutions for OBSAI/CPRI and JESD204[A/B]. For more information, please visit www.xilinx.com/applications/wireless-communications/index.htm.
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