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Aachen produces fast RISC-V simulation technology

Aachen produces fast RISC-V simulation technology

Technology News |
By Peter Clarke



MachineWare GmbH (Aachen, Germany), founded in 2022, is offering a high-speed functional RISC-V simulator called SIM-V.

SIM-V offers customizability for applications ranging from the embedded devices to supercomputers. MachineWare claims SIM-V enables software developers to test complete software stacks – including firmware, operating system kernel and user-space applications, such as virtual machines or rich graphical environments – in real time.

“Our mission is to equip RISC-V software developers with the tools they need to deliver safe and secure software stacks on schedule and glitch-free,” says Lukas Jünger, MachineWare managing director and co-founder.

“Human errors are unavoidable and critical bugs that compromise system safety and security are bound to appear in every project,” added Jünger. “Correct system functionality can only be ensured through extensive testing and rigorous verification. However, automated, cross-architecture continuous-integration systems are still a major resource drain on many software teams. With SIM-V, complex test suites can be set up, executed much faster and scaled up, all before getting near the hardware.”

Variants

MachineWare is offering tailored versions of SIM-V for different use cases.

SIM-V Compute targets the design and verification of high-performance RISC-V systems, including hardware models of GPUs and high-speed PCIes interconnects.

SIM-V Edge is optimized for designing compact 32-bit edge computing systems a supports a broad range of I/O as would be found in microcontrollers.

Both simulators are built an open-source SystemC modelling library called VCML that supports existing verification setups an SystemC models while providing tracing, analysis and scripting features.

SIM-V is also based on MachineWare’s fast and flexible instruction set simulation framework FTL. This enables customization of the simulator to add custom RISC-V instruction set extensions or even design fully custom instruction set simulators for almost any microprocessor architecture.

MachineWare is a spinoff of RWTH Aachen’s Institute for Communication Technologies and Embedded Systems.

Related links and articles:

www.machineware.de

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