ACE extends its compiler and customer design deal with Synopsys
Synopsys is licensing is ACE’s complete CoSy advanced compiler development system that spans a wide range of processor architectures including RISC, DSP, and VLIW. ACE’s dedicated compiler experts will be working alongside Synopsys’ application experts in projects that require the joint optimization of embedded processor architectures and the associated compiler. Together, they expect to deliver the most optimized solution to meet power and performance goals for engineers developing today’s heavy duty application-specific processors.
Synopsys Processor Designer accelerates the design and verification of application-specific instruction-set processors (ASIPs) for embedded applications that are deployed whenever power and/or performance requirements cannot be met by existing processor IP and programmability is still required. In many cases ASIP designs require C-compiler support to enhance programming efficiency. In these cases only the optimum combination of processor architecture and the associated compiler ensures the achievement of power and performance targets. Starting from a processor description in LISA (Language for Instruction Set Architectures), Processor Designer automatically generates the RTL as well as the software tools such as instruction-set simulator (ISS), linker, assembler, debugger and compiler. By licensing ACE’s compiler development system and integrating it with Processor Designer, design engineers can automatically generate a C-compiler that deploys the dedicated optimization engines provided with the CoSy technology.
The Processor Designer tool set and CoSy provide an integrated design environment for application-specific processors (ASIPs), whether custom processors or programmable accelerators and cuts custom processor and programmable accelerator hardware design time by months. This eliminates months of engineer-effort for software tool development through the automated generation of assembler, linker, debugger and compiler and ensures compatibility of instruction set simulator (ISS), software development tools and RTL implementation. Portable C level programming for ASIP provides typical features like fixed point data-types and multiple memory spaces and there is broad architecture and compiler optimization support for RISC, DSP, SIMD and VLIW architectures.
"When companies adopt CoSy, they gain access to a production-quality system to build optimized compilers for the most extreme processors," said Martijn de Lange, founder and CEO of ACE. "The integration of CoSy/CoSy Express with Synopsys Processor Designer gives developers of application-specific processors a quick path to an optimized compiler."
In addition to licensing the CoSy technology, the collaboration agreement also defines that ACE compiler experts are available for customer-specific compiler optimization projects, working alongside Synopsys consultants, all under a single Synopsys consulting agreement. Augmenting Synopsys expertise on ASIP design with ACE’s expertise on compiler optimization facilitates a customer’s ability to meet its processor design targets. The consulting cooperation includes support for CoSy as well as for other compiler development packages such as LLVM (Low Level Virtual Machine).
"Working closely together, Synopsys and ACE can help product development teams take maximum advantage of the Processor Designer tool set and ACE’s proven compiler technology to accelerate increasingly software-dependent product development cycles," said Johannes Stahl, Synopsys’ director of product marketing for system-level solutions.
www.synopsys.com/PD
www.ace.nl/compiler
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