Achronix and MoSys to target 5G and broadband acceleration

Achronix and MoSys to target 5G and broadband acceleration

Technology News |
By Jean-Pierre Joosting

MoSys, Inc., a provider of both semiconductor and IP focused on accelerating data intelligence to enable fast, intelligent data access, and Achronix Semiconductor Corporation a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, have announced a collaboration to deliver a new class of high-speed, programmable, FPGA-based infrastructure products tailored for 5G wireless and core, edge, data center and broadband wired networks. By combining the Achronix Speedster®7t FPGA with the MoSys Stellar Packet Classification Platform IP, the companies aim to deliver key building blocks needed for high-speed routing, compute and security. 

MoSys Stellar Packet Classification IP will utilize the Achronix Speedster7t FPGA high speed GDDR6 memory to add support for: hundreds of millions of lookups per second, millions of packet classification rules, as well as both Access Control Lists (ACL) and Longest Prefix Match (LPM) — with very complex 10+ tuple lookups at up to 480b TCAM-style rules.

MoSys Blazar Acceleration Engine ICs can also be easily coupled to Speedster7t FPGAs to add: in-memory compute capabilities using 25G SerDes lanes, and up to 1 Gb of high-speed memory to complement and expand the on-board FPGA SRAM by up to 5x.

MoSys IP, together with Achronix FPGAs, can offload both high-end servers and multi-terabit switch designs to extend functionality and capacity, as well as reduce latency for critical look-up functions, at much lower power compared to CPU-only based solutions. Combining Achronix Speedster7t FPGAs and MoSys Stellar Packet Classification will improve the performance of a wide range of applications and services for cloud data center operators, 5G mobile telecom service providers, enterprise data centers, and government and research organizations.

Achronix’s latest Speedster7t FPGA is an ideal fit for 5G wireless and Broadband Network Gateway (BNG) applications. With the first Speedster7t device shipping now, the AC7t1500 provides: 692k look-up-tables (LUTs), 195 Mb of memory, 400G Ethernet interfaces, support for PCIe Gen5, eight GDDR6 memory interfaces, and 20 Tbps – 2D network on chip (NoC).

The Speedster®7t device is the first FPGA available with a 2D network on chip (NoC), which helps to support high-speed data transfers from external data interfaces to the FPGA’s internal logic, delivering a total bandwidth of greater than 20 Tbps.

“Achronix’s Speedster7t FPGA products are ideally suited to host our high-speed lookup IP. Now, 5G UPF Core and Edge routing using longest prefix match (LPM) lookups and security, including network firewalls and anti-DDoS applications can use complex access control lists to process traffic at unprecedented performance levels,” said Dan Lewis, CEO of MoSys. “The Achronix design is truly optimized for on-chip and off-chip networking, and, by combining their FPGAs with our Stellar Packet Classification IP and software, will provide a compelling solution to our shared customers in the networking and communications markets.”

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