Advanced 65nm BCD power management platform enables enhanced performance with cost advantages

Advanced 65nm BCD power management platform enables enhanced performance with cost advantages

Feature articles |
By Peter Clarke

The 65nm BCD (Bipolar-CMOS-DMOS) Power Management process node targets any type of power management chip up to 16V operation regardless of application and enables two advanced capabilities. First, it provides a new option to efficiently integrate heavy digital content with power management using high density digital libraries. Second, it enables a cost advantage through very low on-state resistance (Rdson) power transistors combined with the lowest number of production layers.

These advanced capabilities open the entire up to 16V operation power management market. This market size for PMICS up to 16V, is set to be about $9.4 billion for 2018, about 42 percent of the total power IC market, according to IHS Markit. The low voltage power management market includes most types of power products such as load switches, DC-DC converters, protection ICs, monitoring and driving ICs, and more. Most of these products include the power transistors in the chip (monolithic solution), and do not use external MOSFETs. These types of products are mostly cost sensitive with many players competing for the same socket.

However, with an aggressive Rdson of sub 1mΩ*mm², low production layers and 300mm wafer size, companies can gain multiple competitive advantages. The first is die size reduction. This reduction comes mainly from the low Rdson, but it also comes from the technology node using smaller size 5V CMOS transistors. Having smaller transistors also improves the efficiency of the product with smaller capacitance on the gate to drive. Second, the low number of mask layers is not only another enabler for additional cost benefits, but also provides a faster production cycle which is critical in more consumer electronics. Third, the usage of 300mm wafer size enables a better cost structure.

Next: Monolithic

Monolithic solutions and digital integration

There is an increase in the digital content for power management applications (even the simple ones) to include more monitoring of parameters (such as over voltage, over current), more connectivity and smaller power solutions. For example, in the past three years, TowerJazz’s power management customers increased their digital content in power management ICs from around 10 percent to approximately 30 percent. The 65nm offers a digital density for the 5V digital library of 113kgate per square millimeter. This rises to around 800kgate per square millimeter for the 1.2V digital library.

As shown in the chart below, known as Chuck’s Hypothesis on future current density of power solutions developed by Charles (Chuck) Devries from Texas Instruments, the need for embedded digital, power and even external FET to a micro device in power management will continue and more power will be driven by a single IC to decrease the overall solution.

Graph of Chuck’s Hypothesis – More integration and smaller BOM showing increase in current per volume.

Higher power density requires higher switching frequencies to reduce the passive component size and to lower the EMI (Electro Magnetic Interference) in relevant parts of the electromagnetic spectrum. The increase in switching frequency above 1.8MHz reduces the EMI below this frequency and the conducted and radiated emissions are minimized in the strictly regulated AM band.

With 65nm LDMOS, a low Qgd is also achieved, allowing greater levels of integration and reduction in solution size which reduces parasitic components. Size reduction also helps reduce board design issues by allowing the power IC to be closer to the load and reduce board parasitic issues.

Examples of products that benefit from the 65nm BCD process and the main requirements from the technology.

Next: Automotive example

Automotive example

In the automotive market, the increase in the amount of new cars and the increase in the number of power management ICs in each new car are driving the strong demand. According to MarketsandMarkets, the number of new cars increases every year, e.g. from 95 million in 2017 to 104 million in 2021. In each of the new cars, the total power management/analog content grows as well, estimated to be from $63 per car to $98 per car between the years 2017 and 2022. These two estimations are reflected in a total automotive power management market compound annual growth rate of approximately 10 percent, $5.8 billion to $10.3 billion between 2016 and 2022.

The increase in the number of chips within a car drives power management ICs to follow with cost-effective solutions as in the mobile market. Today we see more and more companies integrating multiple secondary DC-DC converters into a single PMIC with multiple outputs. Using 65nm BCD technology, the PMIC can include all the needed voltage levels below 5V to support complicated ECUs such as for LiDAR and cameras. A general description of an electric unit in a car shows the secondary PMIC serving all the digital, memories and sensors operating with variety of voltages such as 5V, 3.3V, 1.8V, and sub 1V.   

General description of an electric control unit in a vehicle

In summary, the 65nm BCD process provides broad design options to IC designers. For example, the option to have more integration of power and digital following multiple trends such as the increased micro motors market, smarter power and higher currents.

Click here for more information about TowerJazz’s power management offering.

Erez Sarig is director of business development and marketing for the power business unit at TowerJazz.

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