Agile Analog delivers configurable ‘always-on’ IP to XMOS

Agile Analog delivers configurable ‘always-on’ IP to XMOS

New Products |
By Peter Clarke

IP licensor Agile Analog Ltd. (Cambridge, England) has delivered an always-on configurable subsystem to fabless chip company XMOS Ltd. (Bristol, England).

The series of IP blocks integrated into a single macro block that enables a low-power sleep mode for SoCs. The IP includes a configurable bandgap reference (agileREF), power-on-reset (agilePOR), oscillator (agileRCOSC), comparator (agileCMP), and capless LDO (agileLDO) IPs. 

“Our always-on IP subsystem includes all of the analog circuitry required to minimize quiescent current in always-on applications,” said Chris Morrison, director of product marketing at Agile Analog, in a statement.

Agile said that Composa can be used generates analog IP for any foundry and on any process. Each of these IPs can be configured to fit the customer’s exact requirements, allowing for optimal power and performance. The IP can also be delivered digitally wrapped to ease the integration process. 

“This project showcases the power of our Composa technology and our commitment to close collaboration with our customers. We are pleased to pave the way for further innovation in the development of next generation SoCs with ultra-low-power capabilities,” said Barry Paterson, CEO at Agile Analog.

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