Engineers at EPFL in Switzerland have developed production techniques for a chip that combines logic and memory in one device using a 2D material.
The Laboratory of Nanoscale Electronics and Structures (LANES) at EPFL uses a 2D layer of molybdenum disuphide (MoS2) to combine memory and logic in one device, called a floating-gate field-effect transistor (FGFETs). The advantage of these transistors is that they can hold electric charges for long periods and are already used in flash memory systems for cameras, smartphones and computers.
The electrical proprieties of MoS2 make it particularly sensitive to charges stored in FGFETs, which is what enabled the LANES engineers to develop circuits that work as both memory storage units and programmable transistors. Using this for both logic and memory is well suited to machine learning algorithms.
The logic-in-memory architecture developed at LANES avoids power losses from moving data around. While prototype individual devices have been built previously, the team has developed a batch process to produce 80 devices at a time.
The devices have a channel length of 1um, but the 2D materials can scale below 12nm, says the team.
“This ability for circuits to perform two functions is similar to how the human brain works, where neurons are involved in both storing memories and conducting mental calculations,” says Andras Kis, the head of LANES. “Our circuit design has several advantages. It can reduce the energy loss associated with transferring data between memory units and processors, cut the amount of time needed for computing operations and shrink the amount of space required. That opens the door to devices that are smaller, more powerful and more energy efficient.”
“We made our first chip ten years ago by hand,” says Kis. “But we have since developed an advanced fabrication process that lets us make 80 or more chips in a single run, with well-controlled properties.”
The paper in Nature is at www.nature.com/articles/s41586-020-2861-0
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