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Altera boosts FPGA for AI, extends lifetime

Altera boosts FPGA for AI, extends lifetime

Business news |
By Nick Flaherty



Intel’s Altera FPGA business is aiming to hit competitor AMD on three fronts.

Not only is it launching its mid-range 7nm Agilex 5 FPGA family with AI acceleration to take on the former Xilinx devices, but Intel’s Altera business is also making its design tools free and extending the lifetime of its MAX and Cyclone devices out to 2040. This follows an end of life call by AMD for some of its older FPGAs.

“FPGAi and FGPAs have a crucial role to play,” said Sandra Rivera, executive vice president of Intel Corporation and chief executive officer of the Programmable Solutions Group (PSG). that Intel is looking to spin out as Altera.

“With Agilex 5 we added tensor units into the DSP blocks and this gives us twice the performance /watt compared to competition,” she said. “The no cost license for Quartus Prime Pro will ensure that we lower the barrier to entry.”

“We are going to be extending MAX and Cyclone further out to 2040 and beyond and that is a new capability that we are offering for a secure supply chain across the entire portfolio for at least 15 years,” she added.

“The Agilex 5 family has 5 times the INT8 resources, giving 56TOPS at INT8 which is significantly higher than we have had in previous generations. This gives 1.7x the frame/s/W vs a GPU and 69% vs other FPGAs. We also have HBM for memory bound applications.”

The Agilex 5 FPGAs are aiming at applications including video, industrial, robotics and medical with hard processor systems using dual-core ARM Cortex A76, dual-core A55 processors and various peripherals.

The AI tool flow allows developers to use existing and popular AI frameworks, along with the Intel OpenVINO toolkit and the FPGA AI Suite, to create AI intellectual property (IP) blocks and easily drop them into the FPGA design.

“The FPGA AI Suite from Altera allowed the Tiami team to rapidly incorporate our IP into an intricate digital signal processing (DSP) pipeline,” said Amitav Mukherjee, CEO at Tiami Networks. “This significantly reduced the time required to integrate AI capabilities with 5G signal processing from an estimated six months to just eight weeks.”

The processor cores are also key to security says Rivera.

“A lot of use cases require security and the demand is increasing 4x because its not just data at rest and in transit but data in use and because we have a processor subsystem in the FPGA we can run security algorithms as well,” she said.  

Altera expects to be ramping the Agilex 5 FPGAs later this year and plans to give more details on the Agilex 3 low end FPGA family  later in the year

 

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