Altera claims breakthrough levels of power efficiencies with Generation 10 FPGAs and SoCs
Generation 10 devices are optimized based on process technology and architecture to deliver the industry’s highest performance and highest levels of system integration at the lowest power. Initial Generation 10 families include Arria 10 and Stratix 10 FPGAs and SoCs with embedded processors. Generation 10 devices leverage the most advanced process technologies in the industry, including Intel’s 14-nm Tri-Gate process and TSMC’s 20 nm process. Early access customers are currently using the Quartus II software for Generation 10 product development.
“Our Generation 10 products will strengthen the penetration of programmable logic into new markets and applications and further accelerate the implementation of FPGAs into sockets traditionally served by ASSPs and ASICs,” said Patrick Dorsey, senior director of product marketing at Altera. “The optimizations we made in our Generation 10 devices allow customers to develop highly customized solutions that dramatically increase system performance and system integration while lowering operating expenses.”
Stratix 10 FPGAs and SoCs are designed to enable the most advanced, highest performance applications in the networking, communications, broadcast and compute and storage markets while slashing system power. Leveraging Intel’s 14 nm Tri-Gate process and an enhanced high-performance architecture, Stratix 10 FPGAs and SoCs have an operating frequency over one gigahertz, 2X the core performance of current high-end 28-nm FPGAs. For high-performance systems that have the most strict power budgets, Stratix 10 devices allow customers to achieve up to a 70 percent reduction in power consumption at performance levels equivalent to the previous generation.
Altera is announcing the technology details of Stratix 10 FPGAs and SoCs as part of the Generation 10 portfolio introduction. Stratix 10 FPGAs and SoCs provide the industry’s highest performance and highest levels of system integration, including:
More than four million logic elements on a single die; 56-Gbps transceivers; More than 10-TeraFLOPs single-precision digital signal processing; a third-generation ultra-high-performance processor system and multi-die 3D solutions capable of integrating SRAM, DRAM and ASICs.
Arria 10 FPGAs and SoCs are the first device families to roll out as part of the Generation 10 portfolio. The device family sets a new bar for midrange programmable devices, delivering both the performance and capabilities of current high-end FPGAs at the lowest midrange power. Leveraging an enhanced architecture that is optimized for TSMC’s 20 nm process, Arria 10 FPGAs and SoCs deliver higher performance at up to 40 percent lower power compared to the previous device family.
Arria 10 devices offer more features and capabilities than today’s current high-end FPGAs, at 15 percent higher performance. Reflecting the trend toward silicon convergence, Arria 10 FPGAs and SoCs offer the highest degree of system integration available in midrange devices, including 1.15 million logic elements (LEs), integrated hard IP and a second-generation processor system that features a 1.5 GHz dual-core ARM Cortex-A9 processor. Arria 10 FPGAs and SoCs also provide 4X greater bandwidth compared to the current generation, including 28-Gbps transceivers, and 3X higher system performance, including 2666 Mbps DDR4 support and up to 15-Gbps Hybrid Memory Cube support.
Generation 10 devices are supported by Altera’s Quartus II development software and tools for higher level design flows that include an OpenCL Software Development Kit (SDK), SoC Embedded Design Suite (EDS) and DSP Builder. This leading-edge development tool suite enables design teams to maximize productivity while making it easier for new design teams to adopt Generation 10 FPGAs and SoCs in their next-generation systems. The Quartus II software will continue to deliver the industry’s fastest compile times by providing Generation 10 FPGAs and SoCs an 8X improvement in compile times versus previous generation. The substantial reduction in compile times is the result of leading-edge software algorithms that take advantage of modern multi-core computing technologies.
Availability
Early access customers are currently using the Quartus II software for development of Arria 10 FPGA and SoCs. Initial samples of Arria 10 devices will be available in early 2014. Altera will have 14 nm Stratix 10 FPGA test chips in 2013 and Quartus II software support for Stratix 10 FPGAs and SoCs in 2014.
More information about the Generation 10 FPGAs and SoCs at www.altera.com/Gen10
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