Altera details Agilex 3 embedded AI FPGA
Altera has shown details of its upcoming Agilex 3 AI FPGA and 11 development kits for its Agilex 5 family.
The Altera Agilex 3 AI FPGA family will range from 25K-135K logic elements alongside a dual Cortex A55 ARM hard processor subsystem with a programmable fabric with AI Tensor Blocks built on the Intel 7 process.
This accelerates FPGA development for AI inference using popular frameworks such as TensorFlow, PyTorch and OpenVINO toolkit and other FPGA development flows such as the Quartus environment.
For intelligent edge applications, the FPGA enables real-time compute for time-sensitive applications like autonomous vehicles and industrial Internet of Things (IoT). For smart factory automation technologies like machine vision and robotics, Agilex 3 FPGAs allow for the integration of sensors, drivers, actuators and machine learning algorithms.
The family offers up to 2.8 peak INT8 TOPS with FPGA AI Suite support to enable push-button flow from industry standard frameworks to FPGA bitstream with a fabric speed of up to 345MHz.
CEO interview: Sandra Rivera of Altera on the move to Intel 18A
The Secure Device Manager (SDM) provides security features such as secure boot, AES encryption, and FPGA configuration management, which runtime sensors and tamper detection, providing ensure authenticated FPGA configuration, support bitstream encryption, and manage enhanced protection against unauthorized access and data integrity threats.
Altera is using variable pitch BGA (VPBGA) packages that use the same design rules as 0.8 mm ball pitch packaging to reduce the package side. Flexible I/O support allows for versatile connectivity options, including high-voltage and high-speed interfaces such as MIPI D-PHY v2.1 and 1.25 Gbit/s low-voltage differential signaling (LVDS). The 12.5 Gbit/s hard transceiver has PCI Express 3.0 and 10G Ethernet hard IP blocks while
“With these key announcements, we continue to execute on our vision of shaping the future by using programmable logic to help customers unlock greater value across a broad range of use cases within the data centre, aerospace and defence sectors, communications infrastructure, automotive, industrial, test, medical and embedded markets,” said Sandra Rivera, CEO of Altera. The sale of the company is one part of Intel’s recovery in the face of an approach by Qualcomm.
Altera says it is the only independent FPGA supplier with full-stack hardware and software for high-performance accelerated computing systems, next-generation communications infrastructure and intelligent edge applications.
Agilex 3 FPGAs use the Altera HyperFlex architecture to provide a 1.9x performance improvement over the previous Cyclone generation. Extending the HyperFlex architecture to Agilex 3 FPGAs enables high clock frequencies up to 345MHz.
Software support for Agilex 3 FPGAs will start in Q1 2025, with development kits and production shipments expected to start in mid-2025.
The upcoming Quartus Prime Pro 24.3 release adds more devices within the Agilex portfolio and enables improved support for embedded applications. Including the Agilex 5 series.
This software release also includes support for embedded applications that employ either an integrated hard-processor subsystem or Altera’s RISC-V solution, the Nios V soft-core processor that can be instantiated in the FPGA fabrics. Agilex 5 FPGA design examples that showcase Nios V capabilities such as lockstep, full ECC, and branch prediction.
Operating system and RTOS support for the Agilex 5 SoC FPGA-based hard processor subsystem is included in the latest releases of Linux, VxWorks and Zephyr with the 11 new Agilex 5 FPGA-based development kits and system-on-modules (SoMs).
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