Alternative methods of LCD control (Part 2 of 2)
(Part 1 looked at the theory of Digital Correlation and Density Modulation for LCD drive, click here to read it.)
Abstract
Multiplexed LCDs have been used for over 30 years, and the methods for driving them are well-known and remained unchanged for the past 20 years. Advancements in LCD materials and a new understanding of density modulation, however, allow for new digital approaches which are scalable with silicon processes and allow for more cost-effective designs. This article will demonstrate a conventional implementation and show two alternative approaches, requiring only digital signals, to drive the LCD.
The first approach relies on the correlated and uncorrelated nature of signals of different frequencies, while the second method exploits the low-pass nature of the LCD glass, allowing it to be driven with a density-modulated signal. The advantages of each technique–such as discrimination ratio, on/off voltage thresholds as function of supply voltage, level of multiplexing, and multiplexing types–will be explained. A working demonstration of all three types will be shown as well.
Implementation
The demonstration project was implemented in PSoC Creator and configured to run on a PSoC 3/5 part. The project was configured to implement both the Digital Correlation and the Density Modulated method with both ½ and ⅓ bias methods. By simply changing a few parameters in the project files though firmware, the project can demonstrate any LCD control technique.
There are two main sections of the LCD control. The first is the Sequencing and Drive Control, which can be observed in Figure 3. The second section is the pin drive logic shown in Figure 4, which takes the various control and drive signals and combines it with the appropriate logic to produce the required drive waveform.
Figure 3. Digital LCD Control Sequencing Control and Drive
The Sequencer is used to indicate which control waveform sub frame is currently being generated while also determining whether the waveform signal requires invertion or not. This block plays the role of a state machine that runs in a continuous loop. Once the entire LCD waveform has been generated, it will roll over and start again.
This particular configuration as seen in Figure 3 is designed for a 4-common display. However, this sequencer can be expanded to incorporate as many as 16 commons by increasing the SubFrame[0..1] size.
The Dead State PWM is used to control the contrast by adjusting the RMS voltage as mention earlier. By changing the parameters of the Dead Time PWM, the amount of time that the common and segment lines are driven low is increased thus decreasing the RMS voltage of the LCD control.
The Bias generation PWM generates two PWM signals: a bias high signal and a bias low signal. When referring to an LCD as being ½ ⅓, or ¼ bias, it is the combination of the high and low bias in this system that creates the desired final-bias level.
Figure 4. Segment and Common Drive Logic
The Display RAM, shown in Figure 4, is where the information for each pixel on the LCD is stored with regards to it being on or off. As the Sequencer cycles through the sub frame, it will select a bit from the Display RAM via the digital de-mux seen in Figure 4. To increase the number of commons in the display, the size of the control register needs to be increased to support the desired amount as well as the de-mux input count.
In the PSoC Creator project, there are multiple schematic pages of the circuit seen in Figure 4 that provide the necessary logic for both the segments and commons. The component that distinguishes a segment from a common is the virtual mux which is set to a value of ‘0’ for a common and a value of ‘1’ for a segment. Using the Display RAM, along with the sequencing and control components, the various logic gates work together to perform the proper decoding to determine how the signal will be presented on the GPIO pin. The LCD then does the rest.
The results were demonstrated on a VIM-404 TN LCD. In firmware, a button was implemented that easily cycled through the various control method the provided a real time demonstration of the different control techniques. Figure 5 demonstrates the Digital Correlation method.
Figure 5. TN LCD Displaying Digital Correlation
With this method, we can observe the effects of the lower discrimination ratio. In order to produce a display where the off pixels do not appear energized, the On voltage has to be dropped as well to the point where the on pixel does not appear to be defined as a traditional LCD control method. This observed effect, however, varies from LCD to LCD, based on the pixel size, LCD voltage, and display type (STN or TN). In testing with STN LCDs, it was impossible to visually distinguish between Digital Correlation and traditional control methods.
Figure 6 and Figure 7 show the PWM drive method with both ½ Bias and ⅓ Bias. While it is apparent there in the observed image between Digital Correlation and PWM, it is difficult to distinguish between ½ and ⅓ bias despite observing closely, ⅓ bias shows a marginally more-defined display.
Figure 6. TN LCD Displaying 1/2 PWM Bias
Figure 7. TN LCD Displaying 1/3 PWM Bias
As mentioned earlier, by increasing the Sequencing Logic, Display RAM, and by adding additional digital logic to support the additional commons/segments, larger LCDs can be supported as per the 16 common STN LCD featured on the CY8C-KIT006, shown below in Figure 8.
Figure 8. CY8C-KIT006 STN LCD with ¼ PWM Bias
While analog LCD control using charge pumps and resistor ladders has been the norm in the semiconductor industry for over 20 years, new digital control methods will prove to be a feasible alternative in the future due to their small implementation size and low power capabilities.
About the author
Robert Murphy is an Application Engineer at Cypress Semiconductor Corp. He graduated from Purdue University with a Bachelors Degree in Electrical Engineering Technology. Robert can be reached at rlrm@cypress.com.
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