Altreonic ports RTOS to dual-core processor
Besides task scheduling, services provided include: events; semaphores; resources; ports; hubs; fifos; packet and memory pools in blocking, non blocking, blocking with timeout and asynchronous semantics.
The company claims porting to the Freescale platform was ‘swift and efficient’. For applications where performance is paramount, Altreonic points out that using less memory can mean higher performance and lower power, and it also claims that by using less L1 cache there is more space for user applications than traditional, monolithic RTOSes.
The company hopes to differentiate its RTOS through its design; it was developed using formal methods which, Altreonic suggests, gives it inherent safety and security benefits, while also resulting in very clean and uniquely scalable architecture, typically resulting in ten times less code than a traditionally designed and functionally equivalent RTOS.
This means developers can transparently program a multiprocessor architecture, allowing applications to be distributed across multiple cores, multiple multicore chips or even over multiple boards. The company states that this can enable one node to be running a legacy OS while allowing other nodes full accesses to its services.
For more information, visit www.altreonic.com
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