The early examples of Fusion have been based on x86 processor and GPU cores developed internally by AMD. However, AMD is clearly heading for a higher level of abstraction and believes it can do better by letting multiple hardware and software companies join with it as it tries to enable heterogeneous computing. It is effectively turning the Fusion marketing brand into the open Fusion System Architecture with a specification that enables chipmakers to combine multiple CPUs and GPUs and preserve an efficient programming model.
The development is likely to allow ARM cores to be used as part of the Fusion architecture although Rogers did not mention ARM explicitly as he laid out the open-platform plan for Fusion.
The main thrust of Roger’s keynote was that AMD wants to create an architecture whereby different combinations of CPU and GPU processor cores operate as a unified processing engine that delivers both higher performance and lower power consumption compared with today’s variants.
Having discussed the historical trends from single- to multicore and on to heterogeneous multicore computing it was about half-way through the talk that Rogers described the Fusion System Architecture as an "open platform" and added that this meant the virtual ISA specification, known as FSAIL, the memory model the despatch mechanism would be published.
Rogers said: "The Fusion system architecture is ISA agnostic for both CPUs and GPUs. This is very important because we’re inviting partners to join us in all areas; other hardware companies to implement FSA and join in the platform; operating systems companies to fully embrace all of the features and deliver its full performance and quality of service; tools and middleware companies to provide the tool infrastructure to develop, optimize and debug the programs that will run on this platform."
He added that an FSA review committee would be formed to guide the evolution of the architecture and to allow all participants a voice in its direction.
Rogers said that current heterogeneous multicore architectures are currently constrained by the programming model and communications overheads. "The good news is the Fusion System Architecture blows away both of these constraints," he said. "Where we’re headed is the architected era. We make the GPU into a peer processor rather than a device," he said
Rogers outlined a roadmap that includes support for C++ features, unification of the address space, support for nested data parallelism, user-mode scheduling for lower latency task dispatch between CPUs and GPUs, and the addition of pre-emption and context switching.
Automated lower balancing between CPU and GPU is part of that progress, according to Rogers. In addition, specific FSA enhancements will be supported by newer programming languages and interfaces such as OpenCL and DirectCompute. One of the next steps will be the addition of bi-directional power management to CPU, GPU combinations. But the key is the creation of a unified memory address space and fully coherent memory shared by the CPU and GPU so they operate seamlessly together, Rogers said.
What was not made clear in what was essentially a technical presentation is how AMD, as one of a number of implementors and contributors to the Fusion System Architecture will make its money from the development of Fusion.