AMD Spartan UltraScale+ FPGA targets cost-sensitive edge applications
AMD is launching a range of FPGAs for cost sensitive applications, building on IP from its UltraScale+ devices.
The AMD Spartan UltraScale+ FPGA family is built in a 16nm FINFET process technology and is optimized for the edge with high I/O counts and flexible interfaces. This reduces the power consumption by 30% over the older 28nm Artix FPGAs.
The family varies from the SU10P with 11,000 logic cells and 304 I/Os in a 10 x 10mm package up to SU200P with 2018,000 logic cells and 572 I/Os in a 23 x 23mm package. This also includes up to 384 DSP blocks for AI processing.
These are also the first AMD UltraScale+ FPGA with a hardened LPDDR5 memory controller and PCIe Gen4 x8 support, competing with the Altera Agilex 5 family when they sample in the first half of 2025.
The family includes support for Post-Quantum Cryptography with established algorithms for IP protection against evolving cyber-attacks and threats. A physical unclonable function provides each device with a unique fingerprint for added security.
PPK/SPK key support helps manage obsolete or compromised security keys while differential power analysis helps protect against side-channel attacks. The devices contain a permanent tamper penalty to further protect against misuse.
“For over 25 years the Spartan FPGA family has helped power some of humanity’s finest achievements, from Mars rovers to lifesaving automated defibrillators,” said Kirk Saban, corporate vice president, Adaptive and Embedded Computing Group, AMD. “Building on proven 16nm technology, the Spartan UltraScale+ family’s enhanced security and features, common design tools and long product lifecycles further strengthen our market-leading FPGA portfolio[i] and underscore our commitment to maximizing design longevity for customers.”
The entire AMD portfolio of FPGAs and adaptive SoCs are supported by the AMD Vivado Design Suite and Vitis Unified Software Platform, allowing hardware and software designers to leverage the productivity benefits of these tools and included IPs via a single designer cockpit from design to verification. Documentation is available today with tools support starting with the AMD Vivado Design Suite in the fourth quarter of 2024.
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