AMD-Xilinx Zynq UltraScale+ MPSoC SiP cuts size and design time

AMD-Xilinx Zynq UltraScale+ MPSoC SiP cuts size and design time

New Products |
By Jean-Pierre Joosting

Octavo Systems has announced a new family of SiP devices based on the AMD Xilinx® Zynq® UltraScale+™ MPSoC Architecture. The OSDZU3, based on the ZU3, provides the benefits of System-in-Package (SiP) while delivering the performance and flexibility expected from the Zynq UltraScale+ architecture.

The OSDZU3 leverages IC manufacturing technology to integrate the AMD-Xilinx Zynq UltraScale+ MPSoC ZU3, a complete and flexible power system, LPDDR4, EEPROM, QSPI, MEMS oscillators, and over one hundred passives, all into a single 20.5- x 40-mm BGA.

The OSDZU3 is about 60 percent smaller than an equivalent system design with discrete components. “The integration not only makes the OSDZU3 perfect for anybody concerned about the Size, Weight, and Power (SWaP) of their product, it is also ideal for anybody looking to move quickly through their design,” says Greg Sheridan, VP Strategy and Marketing at Octavo Systems. “Removing the need to design complicated power systems or DDR has saved our customers upwards of 9 months of design.”

The OSDZU3 provides access to all the interfaces and features on the ZU3. The 1-mm pitch 600 pin ball map provides access to every I/O on the ZU3 in just 2 PCB layers using low-cost design rules. The power system also allows the designer to leverage all the power modes the ZU3 supports.

“System-level solutions are increasingly important to our customers, as they seek to deploy cutting-edge embedded computing and machine learning capabilities within increasingly compressed development timeframes,” said Hanneke Krekels, vice president of Core Vertical Markets, Adaptive & Embedded Computing Group, AMD. “In-line with these objectives, we have worked closely with Octavo Systems to bring the first System-in-Package based on the powerful Zynq UltraScale+ MPSoC. This offering enables our users to accelerate innovation and simplify system design for the most size constrained applications.”

The OSDZU3 is compatible with the AMD-Xilinx development tools, Xilinx Vivado Design Suite and Xilinx Vitis unified software platform. Octavo Systems worked closely with DesignLinx, an AMD-Xilinx Premier Design Service Partner, to develop the base software platform needed to ensure the SiP integrates into the standard AMD-Xilinx tool flow.

“Leveraging our deep knowledge of FPGA and Embedded Software design, we worked with Octavo to ensure the OSDZU3 works seamlessly in the standard AMD-Xilinx development flows. This enables users to take advantage of the SiP in an environment they are comfortable with. This experience allows us to accelerate our mutual customer’s programs using the OSDZU3 SiP,” says Brian Mulhearn, Director of Embedded Solutions, DesignLinx.

Accompanying the OSDZU3 System-in-Package, Octavo Systems will be releasing the OSDZU3-REF reference platform. It features popular interfaces like USB-C, USB 3.0, SATA Host, 1Gb Ethernet, and an FMC LP Connector. It also supports displays through Display Port and a LVDS touch display connector. It will ship with a PetaLinux Distribution and demos that are also developed by DesignLinx.

Octavo Systems has also franchised Avnet as a global distributor to support the roll out and adoption of the new OSDZU3 System-in-Package.

Octavo Systems has Engineering Samples available today through their Beta Program. Design engineers who are interested in gaining access to the Beta program can contact their local Avnet, Octavo Systems, or AMD-Xilinx sales representative.

The reference platform will be available to the general market in Q3 CY2022 and the OSDZU3 will be in production by the end of CY2022

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