Analog IP ported to Samsung Foundry’s 7nm, 5nm processes
New Products
|
By
Peter Clarke
These include 32LP, 28LPP, 28FDSOI, 14LPP, 8LPP, 7LPP and 5LPE. Analog Bits has presented on the challenges and requirements of AI chip design at Samsung Foundry’s SAFE Forum 2020.
The offering includes: PLL, PCIe reference clock, chip-to-chip I/O, clock TX/RX, OSC pads, PVT sensor, power supply glitch detector, multi-protocol SERDES optimized for PCIe protocol.
Related links and articles:
News articles:
Analog IP ported to GloFo’s 12nm FinFET process
CEO interview: The importance of being agile
Thalia, Dolphin partner on speedy analog IP development
Analog IP reuse firm gains funds for expansion
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
