Analog online resistance monitoring of resistive power loads – Part 1

Technology News | September 8, 2014

By eeNews Europe

Editor’s note: In Part 1 of this article the author discusses models and topologies. Part 2 will discuss interesting cases and examples.

In some power-control applications, it is desirable to do the continuous assessment of the working condition (health) of a resistive power-load, for reliability or safety reasons. The heating resistors used in devices for medical purposes (heating pads, towels and blankets) are examples of such applications. To be effective, the assessment should be done by monitoring the resistance of the power-load continuously, without disturbing system’s normal operation (online monitoring). The monitoring system should provide at least a digital alarm-signal, which is active when the resistance is outside a predefined range.

A typical power-control application with simple resistive load-current monitoring can be modeled as depicted in Figure 1, discarding any reactive phenomena. In this lumped model, U is the supply-voltage; I is the current in the circuit; R is the power-load (purely resistive); Rp1, Rp2 and Rp3 represents all parasitic resistances, modeling the resistance of interconnecting wires, connectors and any eventual mechanical or electronic switches (when closed); and Rs is the current-sensing resistor. Let Rp be the total parasitic resistance, defined as Rp = Rp1 + Rp2 + Rp3. If U and Rp are constant, I can only change if R changes, since Rs is constant. Consequently, only current monitoring is required for assessing R deviations. However, in most cases, U and Rp are actually not constant. In fact, even in the usual constant-voltage PWM power-control, U can drift from the expected value due to power-supply excessive internal impedance (poor regulation) and/or voltage tolerance. The parasitic resistance Rp comprises the resistance of wires, connectors and switches, which usually changes with temperature, usage and aging. If the switch is a power MOSFET, for example, its Rds(ON) would increase with temperature, due to its positive temperature coefficient.

Figure 1: A typical power-control application with simple resistive load-current monitoring

Clearly, the variations of U and Rp compromise the accuracy of the simple current-based resistance-monitoring method. To overcome such situation, the resistance monitoring could be based on the calculation of the actual load resistance (R), by measuring both load-current and load-voltage, and performing their division (Ohm’s Law). Nowadays, the typical approach is making such division in the digital domain, which requires at least one ADC (Analog-to-Digital Converter) with two multiplexed input channels and some processing unit, that is, a microcontroller. This approach is attractive, mainly if there is already a microcontroller in the system. However, it may not be the case, or it may be undesirable at all having such task performed by software due to reliability or safety reasons.

In medical-grade equipment, for example, standard IEC 60601-1 (clause 14) states that if essential safety is ensured by programmable systems, then the development cycle must follow a specific process, further complicating the development and posterior certification of the final system. Alternatively, the division could be done in the analog domain, by using a precision analog-divider IC (Integrated Circuit). However, such ICs are usually expensive and quite uncommon nowadays. Yet in the analog domain, we could explore the possibilities of the classic Wheatstone bridge, a well-known circuit in the context of low-power resistance measuring. It will be our starting point.

Prior to the discussion, it is convenient to define R as R = Rn(1+δ), where Rn is the nominal value of R and δ is the relative error of R, defined as δ = R/Rn – 1. Furthermore, let’s define the threshold-points δi and δs as the δ values beyond which the monitoring system actuates (inferior and superior, respectively), signaling a fault condition. In Figure 2 a), a Wheatstone bridge and a comparator are used to generate a logic signal that indicates if R is above or below a certain threshold. It is easy to demonstrate that the resistance threshold is independent of U, which is a characteristic aspect of this bridge topology. In Figure 2 b), the topology is expanded to implement a resistance window comparator, by using an extra resistor (R3) in the reference branch and two comparators. The threshold-points δi and δs are set up by the ratios between R1, R2 and R3, as they define the threshold-voltages of the comparators (Ut1 and Ut2).

Figure 2 – Wheatstone bridge topologies

Although the threshold-points of the circuit of Figure 2 b) are independent of U, they are still affected by the parasitic resistances of the power branch (depicted in Figure 1). Furthermore, the common-mode and differential input-voltages of the comparators are usually very small (R >> Rs). In fact, the expected differential input-voltage range is often comparable to the input offset voltage (IOV) of the comparators, seriously compromising the accuracy of the monitoring system.

Solution generic-model.

To overcome the Rp dependence, we can compare current with load-voltage, instead of comparing it with the supply-voltage U. Furthermore, we can perform the appropriate voltage-scaling before the comparators, to overcome the referred loss of accuracy caused by very small differential input-voltages on the comparators. The generic model of such solution is presented in Figure 3, which includes the parasitic resistances Rp1, Rp2, Rp3. In this model, load-voltage and load-current (represented as the voltage across Rs) are scaled by non-inverting gain stages (rectangular boxes in Figure 3), before being applied to the inputs of the comparators COMP1 and COMP2. These gain stages are invariably implemented with operational amplifiers (OPAMPs) and gain-definition resistors.

Note that the reduction of the error due to very small differential input-voltages is effective only if the IOV range of such OPAMPs is narrower than that of the comparators. This condition is not difficult to meet because precision OPAMPs usually have a smaller IOV range than precision comparators, which is a reason for using OPAMPs as comparators in some low-speed precision applications (see Application Note AN-849 from Analog Devices).

Figure 3 – Generic model.

The differential measurement of current can be converted to a simpler single-ended measurement by placing the analog ground (ground of the resistance-monitoring section) on the lower terminal of Rs. The new quantities in Figure 3 are defined as follows:

Gu1, Gu2: Gains of load-voltage measurement, usually smaller than one.
Gi1, Gi2: Gains of current measurement, usually greater than one.
Uu1, Uu2, Ui1, Ui2: Input-voltages of the comparators (ground-referred).
Ud1, Ud2: Differential input-voltages of the comparators, referred to the inverting input of the respective comparator (Ud1 = Uu1 – Ui1; Ud2 = Ui2 – Uu2).
Ut1, Ut2: Threshold-voltages of COMP1 and COMP2, respectively. At COMP1 threshold, Ut1 = Uu1 = Ui1, Ud1 = 0; at COMP2 threshold, Ut2 = Uu2 = Ui2, Ud2 = 0.

The threshold-points of the model (δi, δs) are defined by the model-gains, as given by (1). We can see that they aren’t affected by U or Rp, as desired.

We should now make a distinction between the actual threshold-points (δi, δs) and the desired threshold-points (±T), which usually correspond to the tolerance of R plus some safety margin. Note that we are assuming the desired threshold-points as opposites, for simplicity. Model adjustment is carried out by setting the gains so that δi = (-T) and δs = T. Taking this in consideration, the model gains are given by (2), (3), (4) and (5). In these formulae, the choice of U, Ut1, Ut2 and Rp is critical, for maximum performance. This subject will be discussed later.

To further understand the model behavior, let’s consider an application example. For a certain application, suppose that the desired model specifications are:

Inserting these specifications in (2), (3), (4) and (5), the following gains result:

Gu1 = 0.201986 Gu2 = 0.168134

Gi1 = 28.4800 Gi2 = 26.7333

The resulting comparator input-voltages (Uu1, Ui1, Uu2, Ui2, Ud1 and Ud2) are plotted in Figure 4 and Figure 5 as a function of δ, considering gain stages as ideal. In Figure 4, the solid traces resulted from U = 15 V, whereas dashed traces resulted from U = 10 V. The Rp value remained unchanged. We can see that the threshold-points (δi and δs) weren’t affected by U variation.

Figure 4 a). Figure 4 b).

In Figure 5, the solid traces resulted from Rp = 10 m, whereas dashed traces resulted from Rp = 200 m. In both cases, U remained unchanged (U = 15 V). We can see that δi and δs weren’t affected by Rp variation.

Figure 5 a). Figure 5 b).

Although U and Rp variations don’t affect δi and δs, they do affect both single-ended and differential input-voltages of the comparators, as seen on Figure 4 and Figure 5. As so, the model gains should be determined carefully, to ensure that the common-mode input-voltage range (CMIVR) of the comparators is respected. In this work, it is assumed that the comparators are capable of near-ground sensing, which means that their CMIVR extends from zero (or below) to some positive value. In Figure 4 a) and Figure 5 a), we can see that, below and above δi and δs, the involved input-voltages (Uu1 and Ui1 for δi, Uu2 and Ui2 for δs) follow opposite trends.

Consequently, the involved input-voltages have their highest simultaneous value at δi and δs, which is Ut1 and Ut2, respectively. As such, for the comparators to be able to provide a proper output state at δi and δs, Ut1 and Ut2 must be inside their CMIVR. If this is the case, the involved input-voltages may go outside the CMIVR below and above δi and δs, because it is guaranteed that there is at least one input-voltage per comparator inside the CMIVR, and most comparators are still able to provide a proper output state in such situation. The industry-standard LM393 is just a classic example of such ability. In Figure 4 a) and Figure 5 a), we see that Ut1 and Ut2 aren’t static, increasing when U increases and/or Rp decreases.

As so, the worst-case working conditions regarding comparator CMIVR occur when U is at its maximum possible value and Rp is at its minimum possible value (in most cases, it can be considered zero). These are the U and Rp values that should be inserted in (2), (3), (4) and (5) for model-gains calculation.

The IOV of the comparators has the effect of shifting the δi and δs threshold-points from the expected values, degrading the accuracy of the resistance monitoring. To minimize the magnitude of such shifts, we should maximize the moduli (absolute-values) of the slopes of Ud1 and Ud2 on δi and δs, respectively, as can be seen in Figure 4 b) and Figure 5 b).

Observing also Figure 4 a) and Figure 5 a), we can see that it can be done by increasing Ut1 and Ut2. Taking in consideration the discussed CMIVR limitation, we conclude that the voltages Ut1 and Ut2 should be chosen near the CMIVR upper-limit, with some safety-margin to account for real-component tolerances and drifts. Being Ut1 and Ut2 chosen, they can be inserted together with T, Rn, Rs, U (maximum value) and Rp (minimum value) into gains formulae ((2), (3), (4), (5)) to calculate the model-gains, completing model adjustment.

Conversely, the threshold-points shift due to the IOV becomes worse as the moduli of the slopes of Ud1 and Ud2 decrease, as seen in Figure 4 b) and Figure 5b). In these figures, we can see also that those moduli decrease as U decreases and/or Rp increases. As so, the worst-case accuracy-loss occurs at the lowest expected U and at the highest expected Rp. In conclusion, the IOV-caused accuracy-loss behavior can be summarized as follows: for a certain comparator IOV range, there are some correspondent minimum-U and maximum-Rp values that must be respected in order to fulfill a certain accuracy specification.

There is also the possibility that, on special situations, U = 0 and/or Rp (+∞). Several examples of these situations include U power-supply shut-down or failure, fuse blowing, the opening of the power-switch in PWM applications, etc. On such events, all comparator input-voltages will be around zero, and the output signal (Fault) will not have a consistent state. In this case, Fault should be ignored, or disabled by some additional validation circuitry.

Please note that the presented conclusions about model adjustment and performance were not based exclusively on the analysis of Figure 4 and Figure 5. Those conclusions were fundamentally based on the mathematical analysis of the model, from which I present only the essential design formulae.

Besides comparator IOV, the accuracy of the monitoring is also affected by the tolerance of the current-sensing resistor (Rs) and by errors in the gain stages, which include OPAMP’s IOV, resistance deviation of gain-definition resistors from the ideal values (resistors only exist in standard values) and resistor tolerance. Given the great number of error sources, the effective accuracy of the monitoring is best assessed by performing a Monte-Carlo analysis on the whole system. Such analysis is available in most SPICE simulators.